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Merge pull request #103 from dop-amin/armv7m-modeling
Armv7m modeling
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,9 @@ | ||
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start: | ||
ldr r1, [r0, #4] | ||
add r1, r2, r1 | ||
eor.w r1, r1, r3 | ||
smlabt r3, r2, r2, r1 | ||
asrs r3, r3, #1 | ||
str r3, [r0, #4] | ||
end: |
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@@ -0,0 +1,10 @@ | ||
/* For example, r5 represents an address where we will stop iterating and r6 is | ||
the actual pointer which is incremented inside the loop. */ | ||
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mov.w r6, #0 | ||
add.w r5, r6, #64 | ||
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start: | ||
add r6, r6, #4 | ||
cmp.w r6, r5 | ||
bne.w start |
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,4 @@ | ||
movw r5, #16 | ||
start: | ||
subs.w r5, #1 | ||
bne.w start |
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,33 @@ | ||
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start: | ||
// Instructions: 6 | ||
// Expected cycles: 5 | ||
// Expected IPC: 1.20 | ||
// | ||
// Cycle bound: 5.0 | ||
// IPC bound: 1.20 | ||
// | ||
// Wall time: 0.02s | ||
// User time: 0.02s | ||
// | ||
// ----- cycle (expected) ------> | ||
// 0 25 | ||
// |------------------------|---- | ||
ldr r6, [r0, #4] // *............................. | ||
add r6, r2, r6 // .*............................ | ||
eor.w r3, r6, r3 // ..*........................... | ||
smlabt r12, r2, r2, r3 // ..*........................... | ||
asrs r3, r12, #1 // ....*......................... | ||
str r3, [r0, #4] // ....*......................... | ||
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// ------ cycle (expected) ------> | ||
// 0 25 | ||
// |------------------------|----- | ||
// ldr r1, [r0, #4] // *.............................. | ||
// add r1, r2, r1 // .*............................. | ||
// eor.w r1, r1, r3 // ..*............................ | ||
// smlabt r3, r2, r2, r1 // ..*............................ | ||
// asrs r3, r3, #1 // ....*.......................... | ||
// str r3, [r0, #4] // ....*.......................... | ||
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end: |
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,29 @@ | ||
/* For example, r5 represents an address where we will stop iterating and r6 is | ||
the actual pointer which is incremented inside the loop. */ | ||
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mov.w r6, #0 | ||
add.w r5, r6, #64 | ||
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1: | ||
// Instructions: 1 | ||
// Expected cycles: 1 | ||
// Expected IPC: 1.00 | ||
// | ||
// Cycle bound: 1.0 | ||
// IPC bound: 1.00 | ||
// | ||
// Wall time: 0.02s | ||
// User time: 0.02s | ||
// | ||
// ----- cycle (expected) ------> | ||
// 0 25 | ||
// |------------------------|---- | ||
add r6, r6, #4 // *............................. | ||
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// ------ cycle (expected) ------> | ||
// 0 25 | ||
// |------------------------|----- | ||
// add r6, r6, #4 // *.............................. | ||
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cmp r6, r5 | ||
bne 1b |
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,11 @@ | ||
movw r5, #16 | ||
start: | ||
// Instructions: 0 | ||
// Expected cycles: 0 | ||
// Expected IPC: 0.00 | ||
// | ||
// Wall time: 0.00s | ||
// User time: 0.00s | ||
// | ||
subs r5, #1 | ||
bne start |
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@@ -0,0 +1,31 @@ | ||
/* For example, r5 represents an address where we will stop iterating and r6 is | ||
the actual pointer which is incremented inside the loop. */ | ||
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mov.w r6, #0 | ||
add.w r5, r6, #64 | ||
vmov s0, r5 | ||
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start: | ||
// Instructions: 1 | ||
// Expected cycles: 1 | ||
// Expected IPC: 1.00 | ||
// | ||
// Cycle bound: 1.0 | ||
// IPC bound: 1.00 | ||
// | ||
// Wall time: 0.02s | ||
// User time: 0.02s | ||
// | ||
// ----- cycle (expected) ------> | ||
// 0 25 | ||
// |------------------------|---- | ||
add r6, r6, #4 // *............................. | ||
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// ------ cycle (expected) ------> | ||
// 0 25 | ||
// |------------------------|----- | ||
// add r6, r6, #4 // *.............................. | ||
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vmov r5, s0 | ||
cmp r6, r5 | ||
bne start |
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