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Merge pull request #103 from dop-amin/armv7m-modeling
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Armv7m modeling
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mkannwischer authored Dec 3, 2024
2 parents 90a78c0 + 98e876c commit 76f3043
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76 changes: 76 additions & 0 deletions example.py
Original file line number Diff line number Diff line change
Expand Up @@ -31,7 +31,9 @@

from slothy import Slothy, Config

import slothy.targets.arm_v7m.arch_v7m as Arch_Armv7M
import slothy.targets.arm_v81m.arch_v81m as Arch_Armv81M
import slothy.targets.arm_v7m.cortex_m7 as Target_CortexM7
import slothy.targets.arm_v81m.cortex_m55r1 as Target_CortexM55r1
import slothy.targets.arm_v81m.cortex_m85r1 as Target_CortexM85r1

Expand All @@ -43,6 +45,7 @@

target_label_dict = {Target_CortexA55: "a55",
Target_CortexA72: "a72",
Target_CortexM7: "m7",
Target_CortexM55r1: "m55",
Target_CortexM85r1: "m85",
Target_AppleM1_firestorm: "m1_firestorm",
Expand Down Expand Up @@ -76,6 +79,8 @@ def __init__(self, infile, name=None, funcname=None, suffix="opt",
subfolder = ""
if self.arch == AArch64_Neon:
subfolder = "aarch64/"
elif self.arch == Arch_Armv7M:
subfolder = "armv7m/"
self.infile_full = f"examples/naive/{subfolder}{self.infile}.s"
self.outfile_full = f"examples/opt/{subfolder}{self.outfile}.s"
self.name = name
Expand Down Expand Up @@ -634,7 +639,72 @@ def core(self,slothy):
slothy.config.sw_pipelining.optimize_postamble = False
slothy.optimize_loop("start")

class Armv7mExample0(Example):
def __init__(self, var="", arch=Arch_Armv7M, target=Target_CortexM7):
name = "armv7m_simple0"
infile = name

if var != "":
name += f"_{var}"
infile += f"_{var}"
name += f"_{target_label_dict[target]}"

super().__init__(infile, name, rename=True, arch=arch, target=target)

def core(self,slothy):
slothy.config.variable_size=True
slothy.config.inputs_are_outputs = True
slothy.optimize(start="start", end="end")

class Armv7mLoopSubs(Example):
def __init__(self, var="", arch=Arch_Armv7M, target=Target_CortexM7):
name = "loop_subs"
infile = name

if var != "":
name += f"_{var}"
infile += f"_{var}"
name += f"_{target_label_dict[target]}"

super().__init__(infile, name, rename=True, arch=arch, target=target)

def core(self,slothy):
slothy.config.variable_size=True
slothy.optimize_loop("start")

class Armv7mLoopCmp(Example):
def __init__(self, var="", arch=Arch_Armv7M, target=Target_CortexM7):
name = "loop_cmp"
infile = name

if var != "":
name += f"_{var}"
infile += f"_{var}"
name += f"_{target_label_dict[target]}"

super().__init__(infile, name, rename=True, arch=arch, target=target)

def core(self,slothy):
slothy.config.variable_size=True
slothy.config.outputs = ["r6"]
slothy.optimize_loop("start")

class Armv7mLoopVmovCmp(Example):
def __init__(self, var="", arch=Arch_Armv7M, target=Target_CortexM7):
name = "loop_vmov_cmp"
infile = name

if var != "":
name += f"_{var}"
infile += f"_{var}"
name += f"_{target_label_dict[target]}"

super().__init__(infile, name, rename=True, arch=arch, target=target)

def core(self,slothy):
slothy.config.variable_size=True
slothy.config.outputs = ["r6"]
slothy.optimize_loop("start")

class ntt_kyber_123_4567(Example):
def __init__(self, var="", arch=AArch64_Neon, target=Target_CortexA55, timeout=None):
Expand Down Expand Up @@ -1425,9 +1495,15 @@ def main():
AArch64Example2(),
AArch64Example2(target=Target_CortexA72),

# Armv7m examples
Armv7mExample0(),

# Loop examples
AArch64LoopSubs(),
LoopLe(),
Armv7mLoopSubs(),
Armv7mLoopCmp(),
Armv7mLoopVmovCmp(),

CRT(),

Expand Down
9 changes: 9 additions & 0 deletions examples/naive/armv7m/armv7m_simple0.s
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@@ -0,0 +1,9 @@

start:
ldr r1, [r0, #4]
add r1, r2, r1
eor.w r1, r1, r3
smlabt r3, r2, r2, r1
asrs r3, r3, #1
str r3, [r0, #4]
end:
10 changes: 10 additions & 0 deletions examples/naive/armv7m/loop_cmp.s
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@@ -0,0 +1,10 @@
/* For example, r5 represents an address where we will stop iterating and r6 is
the actual pointer which is incremented inside the loop. */

mov.w r6, #0
add.w r5, r6, #64

start:
add r6, r6, #4
cmp.w r6, r5
bne.w start
4 changes: 4 additions & 0 deletions examples/naive/armv7m/loop_subs.s
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@@ -0,0 +1,4 @@
movw r5, #16
start:
subs.w r5, #1
bne.w start
33 changes: 33 additions & 0 deletions examples/opt/armv7m/armv7m_simple0_opt_m7.s
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@@ -0,0 +1,33 @@

start:
// Instructions: 6
// Expected cycles: 5
// Expected IPC: 1.20
//
// Cycle bound: 5.0
// IPC bound: 1.20
//
// Wall time: 0.02s
// User time: 0.02s
//
// ----- cycle (expected) ------>
// 0 25
// |------------------------|----
ldr r6, [r0, #4] // *.............................
add r6, r2, r6 // .*............................
eor.w r3, r6, r3 // ..*...........................
smlabt r12, r2, r2, r3 // ..*...........................
asrs r3, r12, #1 // ....*.........................
str r3, [r0, #4] // ....*.........................

// ------ cycle (expected) ------>
// 0 25
// |------------------------|-----
// ldr r1, [r0, #4] // *..............................
// add r1, r2, r1 // .*.............................
// eor.w r1, r1, r3 // ..*............................
// smlabt r3, r2, r2, r1 // ..*............................
// asrs r3, r3, #1 // ....*..........................
// str r3, [r0, #4] // ....*..........................

end:
29 changes: 29 additions & 0 deletions examples/opt/armv7m/loop_cmp_opt_m7.s
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@@ -0,0 +1,29 @@
/* For example, r5 represents an address where we will stop iterating and r6 is
the actual pointer which is incremented inside the loop. */

mov.w r6, #0
add.w r5, r6, #64

1:
// Instructions: 1
// Expected cycles: 1
// Expected IPC: 1.00
//
// Cycle bound: 1.0
// IPC bound: 1.00
//
// Wall time: 0.02s
// User time: 0.02s
//
// ----- cycle (expected) ------>
// 0 25
// |------------------------|----
add r6, r6, #4 // *.............................

// ------ cycle (expected) ------>
// 0 25
// |------------------------|-----
// add r6, r6, #4 // *..............................

cmp r6, r5
bne 1b
11 changes: 11 additions & 0 deletions examples/opt/armv7m/loop_subs_opt_m7.s
Original file line number Diff line number Diff line change
@@ -0,0 +1,11 @@
movw r5, #16
start:
// Instructions: 0
// Expected cycles: 0
// Expected IPC: 0.00
//
// Wall time: 0.00s
// User time: 0.00s
//
subs r5, #1
bne start
31 changes: 31 additions & 0 deletions examples/opt/armv7m/loop_vmov_cmp_opt_m7.s
Original file line number Diff line number Diff line change
@@ -0,0 +1,31 @@
/* For example, r5 represents an address where we will stop iterating and r6 is
the actual pointer which is incremented inside the loop. */

mov.w r6, #0
add.w r5, r6, #64
vmov s0, r5

start:
// Instructions: 1
// Expected cycles: 1
// Expected IPC: 1.00
//
// Cycle bound: 1.0
// IPC bound: 1.00
//
// Wall time: 0.02s
// User time: 0.02s
//
// ----- cycle (expected) ------>
// 0 25
// |------------------------|----
add r6, r6, #4 // *.............................

// ------ cycle (expected) ------>
// 0 25
// |------------------------|-----
// add r6, r6, #4 // *..............................

vmov r5, s0
cmp r6, r5
bne start
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