GitHub - romovs/xula-lib-verilog: Collection of helper modules for XuLA-200 FPGA development board written in Verilog-2001.

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Collection of helper modules for XuLA-200 FPGA development board written in Verilog-2001.

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Name		Name	Last commit message	Last commit date
Latest commit History 24 Commits
camera		camera
host_PC		host_PC
Clk.v		Clk.v
HostIo.v		HostIo.v
LICENSE		LICENSE
Makefile		Makefile
Math.v		Math.v
README		README
SdramCtrl.v		SdramCtrl.v
Test.ucf		Test.ucf
Test.v		Test.v

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                                xula-lib-verilog


About:
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xula-lib-verilog is a set of Verilog-2001 helper modules for XuLA-200 FPGA 
development board. It includes modules for interacting with OmniVision image 
sensors, SDRAM controller for the on-board RAM chip, and a module for 
communicating between PC <-> FPGA through JTAG primitive.

Based on original XESS Corp. VHDL code.


Files: 
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camera/            - Modules for interacting with OmniVision image sensors.
  CameraSetup.v      - Top module for camera initialization.  
  OV7670Init.v       - Registers configuration for OV7670 model.
  RGB565Receive.v    - Module for receiving RGB565 pixel data from camera.
  SCCBCtrl.v         - Provides communication over SCCB with OV cameras.
host_PC/           - Simple host PC test application for Linux.
Clk.v              - Helper modules for working with clock signals.
HostIo.v           - PC <-> FPGA communication through the JTAG primitive.
SdramCtrl.v        - Single port SDRAM controller.
Math.v             - Math helper functions for other modules.
Test.v             - Top test/example module.