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update testcase to spec 0.9.10
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linsinan1995 committed Nov 8, 2021
1 parent 79182e2 commit 9377740
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27 changes: 27 additions & 0 deletions gas/testsuite/gas/riscv/insn-dsp-zbpbo.d
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@@ -0,0 +1,27 @@
#as: -march=rv32gc_zbpbo_zpn_zpsf
#source: insn-dsp-zbpbo.s
#objdump: -d

.*:[ ]+file format .*


Disassembly of section .text:

0+000 <dsp>:
[ ]+.*:[ ]+.*[ ]+clz[ ]+a1,a2
[ ]+.*:[ ]+.*[ ]+clz[ ]+a1,a2
[ ]+.*:[ ]+.*[ ]+cmix[ ]+a1,a2,a3,a4
[ ]+.*:[ ]+.*[ ]+cmix[ ]+a0,a2,a1,a3
[ ]+.*:[ ]+.*[ ]+fsr[ ]+a1,a2,a3,a4
[ ]+.*:[ ]+.*[ ]+fsri[ ]+a1,a2,a3,0x5
[ ]+.*:[ ]+.*[ ]+max[ ]+a1,a2,a3
[ ]+.*:[ ]+.*[ ]+min[ ]+a1,a2,a3
[ ]+.*:[ ]+.*[ ]+max[ ]+a1,a2,a3
[ ]+.*:[ ]+.*[ ]+min[ ]+a1,a2,a3
[ ]+.*:[ ]+.*[ ]+pack[ ]+a1,a2,a3
[ ]+.*:[ ]+.*[ ]+packu[ ]+a1,a2,a3
[ ]+.*:[ ]+.*[ ]+pack[ ]+a1,a2,a3
[ ]+.*:[ ]+.*[ ]+packu[ ]+a1,a2,a3
[ ]+.*:[ ]+.*[ ]+rev[ ]+a1,a2
[ ]+.*:[ ]+.*[ ]+rev8.h[ ]+a1,a2
[ ]+.*:[ ]+.*[ ]+rev8.h[ ]+a1,a2
18 changes: 18 additions & 0 deletions gas/testsuite/gas/riscv/insn-dsp-zbpbo.s
Original file line number Diff line number Diff line change
@@ -0,0 +1,18 @@
dsp:
clz a1,a2
clz32 a1,a2
cmix a1,a2,a3,a4
bpick a0,a1,a3,a2
fsr a1,a2,a3,a4
fsri a1,a2,a3,5
max a1,a2,a3
min a1,a2,a3
maxw a1,a2,a3
minw a1,a2,a3
pack a1,a2,a3
packu a1,a2,a3
pktt16 a1,a2,a3
pkbb16 a1,a2,a3
rev a1,a2
rev8.h a1,a2
swap8 a1,a2
5 changes: 1 addition & 4 deletions gas/testsuite/gas/riscv/insn-dsp.d
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
#as: -march=rv32i_zpn_zpsf
#as: -march=rv32gc_zpn_zpsf
#source: insn-dsp.s
#objdump: -d

Expand Down Expand Up @@ -97,7 +97,6 @@ Disassembly of section .text:
[ ]+.*:[ ]+.*[ ]+kabs16[ ]+a1,a2
[ ]+.*:[ ]+.*[ ]+clrs16[ ]+a1,a2
[ ]+.*:[ ]+.*[ ]+clz16[ ]+a1,a2
[ ]+.*:[ ]+.*[ ]+clo16[ ]+a1,a2
[ ]+.*:[ ]+.*[ ]+pkbt16[ ]+a1,a2,a2
[ ]+.*:[ ]+.*[ ]+smin8[ ]+a1,a2,a3
[ ]+.*:[ ]+.*[ ]+umin8[ ]+a1,a2,a3
Expand All @@ -110,7 +109,6 @@ Disassembly of section .text:
[ ]+.*:[ ]+.*[ ]+uclip8[ ]+a1,a2,3
[ ]+.*:[ ]+.*[ ]+clrs8[ ]+a1,a2
[ ]+.*:[ ]+.*[ ]+clz8[ ]+a1,a2
[ ]+.*:[ ]+.*[ ]+clo8[ ]+a1,a2
[ ]+.*:[ ]+.*[ ]+swap8[ ]+a1,a2
[ ]+.*:[ ]+.*[ ]+sunpkd810[ ]+a1,a2
[ ]+.*:[ ]+.*[ ]+sunpkd820[ ]+a1,a2
Expand Down Expand Up @@ -173,7 +171,6 @@ Disassembly of section .text:
[ ]+.*:[ ]+.*[ ]+uclip32[ ]+a1,a2,5
[ ]+.*:[ ]+.*[ ]+clrs32[ ]+a1,a2
[ ]+.*:[ ]+.*[ ]+clz32[ ]+a1,a2
[ ]+.*:[ ]+.*[ ]+clo32[ ]+a1,a2
[ ]+.*:[ ]+.*[ ]+pbsad[ ]+a1,a2,a3
[ ]+.*:[ ]+.*[ ]+pbsada[ ]+a1,a2,a3
[ ]+.*:[ ]+.*[ ]+smaqa[ ]+a1,a2,a3
Expand Down
3 changes: 0 additions & 3 deletions gas/testsuite/gas/riscv/insn-dsp.s
Original file line number Diff line number Diff line change
Expand Up @@ -101,7 +101,6 @@ dsp:
kabs16 a1, a2
clrs16 a1, a2
clz16 a1, a2
clo16 a1, a2
swap16 a1, a2

# Table 8. SIMD 8-bit Miscellaneous Instructions (12)
Expand All @@ -116,7 +115,6 @@ dsp:
uclip8 a1, a2, 3
clrs8 a1, a2
clz8 a1, a2
clo8 a1, a2
swap8 a1, a2

# Table 9. 8-bit Unpacking Instructions (10)
Expand Down Expand Up @@ -193,7 +191,6 @@ dsp:
uclip32 a1, a2, 5
clrs32 a1, a2
clz32 a1, a2
clo32 a1, a2
pbsad a1, a2, a3
pbsada a1, a2, a3

Expand Down
24 changes: 24 additions & 0 deletions gas/testsuite/gas/riscv/insn-dsp64-zbpbo.d
Original file line number Diff line number Diff line change
@@ -0,0 +1,24 @@
#as: -march=rv64gc_zbpbo_zpn_zpsf
#source: insn-dsp64-zbpbo.s
#objdump: -d

.*:[ ]+file format .*


Disassembly of section .text:

0+000 <dsp64>:
[ ]+.*:[ ]+.*[ ]+cmix[ ]+a1,a2,a3,a4
[ ]+.*:[ ]+.*[ ]+cmix[ ]+a0,a2,a1,a3
[ ]+.*:[ ]+.*[ ]+fsrw[ ]+a1,a2,a3,a4
[ ]+.*:[ ]+.*[ ]+max[ ]+a1,a2,a3
[ ]+.*:[ ]+.*[ ]+min[ ]+a1,a2,a3
[ ]+.*:[ ]+.*[ ]+max[ ]+a1,a2,a3
[ ]+.*:[ ]+.*[ ]+min[ ]+a1,a2,a3
[ ]+.*:[ ]+.*[ ]+pack[ ]+a1,a2,a3
[ ]+.*:[ ]+.*[ ]+packu[ ]+a1,a2,a3
[ ]+.*:[ ]+.*[ ]+pack[ ]+a1,a2,a3
[ ]+.*:[ ]+.*[ ]+packu[ ]+a1,a2,a3
[ ]+.*:[ ]+.*[ ]+rev[ ]+a1,a2
[ ]+.*:[ ]+.*[ ]+rev8.h[ ]+a1,a2
[ ]+.*:[ ]+.*[ ]+rev8.h[ ]+a1,a2
15 changes: 15 additions & 0 deletions gas/testsuite/gas/riscv/insn-dsp64-zbpbo.s
Original file line number Diff line number Diff line change
@@ -0,0 +1,15 @@
dsp64:
cmix a1,a2,a3,a4
bpick a0,a1,a3,a2
fsrw a1,a2,a3,a4
max a1,a2,a3
min a1,a2,a3
maxw a1,a2,a3
minw a1,a2,a3
pack a1,a2,a3
packu a1,a2,a3
pkbb32 a1,a2,a3
pktt32 a1,a2,a3
rev a1,a2
rev8.h a1,a2
swap8 a1,a2
2 changes: 1 addition & 1 deletion gas/testsuite/gas/riscv/insn-dsp64.d
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
#as: -march=rv64i_zpn_zpsf
#as: -march=rv64gc_zpn_zpsf
#source: insn-dsp64.s
#objdump: -dr

Expand Down
2 changes: 1 addition & 1 deletion gas/testsuite/gas/riscv/insn-dsp64.s
Original file line number Diff line number Diff line change
Expand Up @@ -78,7 +78,7 @@ dsp64:
# Table 31. (RV64 Only) 32-bit Parallel Multiply & Add Instructions (12)
kmda32 a1, a2, a3
kmxda32 a1, a2, a3
kmada32 a1, a2, a3
kmar64 a1, a2, a3
kmaxda32 a1, a2, a3
kmads32 a1, a2, a3
kmadrs32 a1, a2, a3
Expand Down

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