Clarified syntax of regular instructions #205
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See riscv#204 Before this change the text implied that bit encodings and variable arguments could not be mixed in the list of instruction arguments. Signed-off-by: Thomas Hepworth <[email protected]>
aswaterman
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Oct 26, 2023
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See #204
Before this change the text implied that bit encodings and variable arguments could not be mixed in the list of instruction arguments.