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Privileged:
"The hstatus fields VTSR, VTW, and VTVM are defined analogously to the mstatus fields TSR, TW, and TVM, but affect execution only in VS-mode, and cause virtual-instruction exceptions instead of illegal-instruction exceptions. When VTSR=1, an attempt in VS-mode to execute SRET raises a virtual-instruction exception. When VTW=1 (and assuming mstatus.TW=0), an attempt in VS-mode to execute WFI raises a virtual-instruction exception if the WFI does not complete within an implementation-specific, bounded time limit. An implementation may have WFI always raise a virtual-instruction exception in VS-mode when VTW=1 (and mstatus.TW=0), even if there are pending globally-disabled interrupts when the instruction is executed. When VTVM=1, an attempt in VS-mode to execute SFENCE.VMA or SINVAL.VMA or to access CSR satp raises a virtual-instruction exception."
Question:
hstatus.VTW=1 and assuming mstatus.TW=0,an attempt in VS-mode to execute WFI raises a virtual-instruction exception,hstatus.VTW=1 and mstatus.TW=1,an attempt in VS-mode to execute WFI raises a illegal-instruction exception.But when VTSR=1 and VTVM=1,regardless of whether TSR and TVM is 0 or 1, an attempt in VS-mode to execute SRET or SFENCE.VMA raises a virtual-instruction exception.
It is not clear what the privileged design intention is here.
The text was updated successfully, but these errors were encountered:
Privileged:
"The hstatus fields VTSR, VTW, and VTVM are defined analogously to the mstatus fields TSR, TW, and TVM, but affect execution only in VS-mode, and cause virtual-instruction exceptions instead of illegal-instruction exceptions. When VTSR=1, an attempt in VS-mode to execute SRET raises a virtual-instruction exception. When VTW=1 (and assuming mstatus.TW=0), an attempt in VS-mode to execute WFI raises a virtual-instruction exception if the WFI does not complete within an implementation-specific, bounded time limit. An implementation may have WFI always raise a virtual-instruction exception in VS-mode when VTW=1 (and mstatus.TW=0), even if there are pending globally-disabled interrupts when the instruction is executed. When VTVM=1, an attempt in VS-mode to execute SFENCE.VMA or SINVAL.VMA or to access CSR satp raises a virtual-instruction exception."
Question:
hstatus.VTW=1 and assuming mstatus.TW=0,an attempt in VS-mode to execute WFI raises a virtual-instruction exception,hstatus.VTW=1 and mstatus.TW=1,an attempt in VS-mode to execute WFI raises a illegal-instruction exception.But when VTSR=1 and VTVM=1,regardless of whether TSR and TVM is 0 or 1, an attempt in VS-mode to execute SRET or SFENCE.VMA raises a virtual-instruction exception.
It is not clear what the privileged design intention is here.
The text was updated successfully, but these errors were encountered: