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target/riscv: access registers via reg->type #1083

target/riscv: access registers via reg->type

target/riscv: access registers via reg->type #1083

Triggered via pull request December 20, 2024 11:57
Status Success
Total duration 12m 39s
Artifacts 1

spike-openocd-tests.yml

on: pull_request
Test debug (Ubuntu)
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Test debug (Ubuntu)
ubuntu-latest pipelines will use ubuntu-24.04 soon. For more details, see https://github.com/actions/runner-images/issues/10636

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