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Fix some CI issues #1

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Sep 19, 2023
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17 changes: 17 additions & 0 deletions .github/verible.waiver
Original file line number Diff line number Diff line change
@@ -0,0 +1,17 @@
# Copyright 2023 ETH Zurich and University of Bologna.
# Licensed under the Apache License, Version 2.0, see LICENSE for details.
# SPDX-License-Identifier: Apache-2.0

# Auto-generated configuration registers are waived
waive --rule=typedef-structs-unions --location="hw/system/spatz_cluster/src/spatz_cluster_peripheral/*"
waive --rule=line-length --location="hw/system/spatz_cluster/src/spatz_cluster_peripheral/*"
waive --rule=no-trailing-spaces --location="hw/system/spatz_cluster/src/spatz_cluster_peripheral/*"
waive --rule=parameter-name-style --location="hw/system/spatz_cluster/src/spatz_cluster_peripheral/*"
# Our parameters are not CamelCase
waive --rule=parameter-name-style --location="hw/ip/snitch/src/snitch_pkg.sv"
waive --rule=parameter-name-style --location="hw/ip/spatz/src/generated/spatz_pkg.sv"
# Our interfaces do not follow the interface conventions
waive --rule=interface-name-style --location="hw/ip/reqrsp_interface/src/reqrsp_intf.sv"
waive --rule=interface-name-style --location="hw/ip/tcdm_interface/src/tcdm_interface.sv"
# We have some long lines
waive --rule=line-length --location="hw/*"
5 changes: 5 additions & 0 deletions .github/workflows/ci.yml
Original file line number Diff line number Diff line change
@@ -1,3 +1,7 @@
# Copyright 2023 ETH Zurich and University of Bologna.
# Licensed under the Apache License, Version 2.0, see LICENSE for details.
# SPDX-License-Identifier: Apache-2.0

name: gitlab-ci

on: [ push, pull_request, workflow_dispatch ]
Expand Down Expand Up @@ -51,3 +55,4 @@ jobs:
domain: iis-git.ee.ethz.ch
repo: github-mirror/spatz
token: ${{ secrets.GITLAB_TOKEN }}
poll-count: 2160
8 changes: 0 additions & 8 deletions Bender.yml
Original file line number Diff line number Diff line change
Expand Up @@ -53,14 +53,6 @@ sources:
## hw/ip/mem_interface ##

- hw/ip/mem_interface/src/mem_wide_narrow_mux.sv
- hw/ip/mem_interface/src/mem_interface.sv
- target: simulation
files:
- hw/ip/mem_interface/src/mem_test.sv
- target: test
files:
# Level 0
- hw/ip/mem_interface/test/mem_wide_narrow_mux_tb.sv

## hw/ip/tcdm_interface ##

Expand Down
19 changes: 17 additions & 2 deletions README.md
Original file line number Diff line number Diff line change
Expand Up @@ -3,8 +3,7 @@

# Spatz

Spatz is a compact vector processor based on [RISC-V's Vector Extension (RVV) v1.0](https://github.com/riscv/riscv-v-spec/releases/tag/v1.0).
Spatz acts as a coprocessor of [Snitch](https://github.com/pulp-platform/snitch), a tiny 64-bit scalar core.
Spatz is a compact vector processor based on [RISC-V's Vector Extension (RVV) v1.0](https://github.com/riscv/riscv-v-spec/releases/tag/v1.0). Spatz acts as a coprocessor of [Snitch](https://github.com/pulp-platform/snitch), a tiny 64-bit scalar core. It is developed as part of the PULP project, a joint effort between ETH Zurich and the University of Bologna.

## Getting started

Expand Down Expand Up @@ -120,3 +119,19 @@ The following directories contains third-party sources that come with their lice
- `sw/snRuntime/vendor`
- `sw/toolchain/`
- `util/vendor`

## Publications

If you want to use Spatz, you can cite us:

```bibtex
@Article{Spatz2023,
title = {Spatz: Clustering Compact RISC-V-Based Vector Units to Maximize Computing Efficiency},
author = {Matheus Cavalcante and Matteo Perotti and Samuel Riedel and Luca Benini},
year = {2023},
month = sep,
eprint = {2309.5116558},
archivePrefix = {arXiv},
primaryClass = {cs.AR}
}
```
113 changes: 0 additions & 113 deletions hw/ip/mem_interface/src/mem_interface.sv

This file was deleted.

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