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Cluster: add EOC register to peripherals registers
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@ezelioli
ezelioli committed Oct 31, 2024
1 parent 2334c80 commit d2f7685
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Showing 3 changed files with 73 additions and 14 deletions.
12 changes: 12 additions & 0 deletions hw/system/spatz_cluster/src/spatz_cluster_peripheral/spatz_cluster_peripheral_reg.hjson
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Original file line number Diff line number Diff line change
Expand Up @@ -426,6 +426,18 @@
name: "ENTRY_POINT",
desc: "Post-bootstrapping entry point."
}]
},
{
name: "CLUSTER_EOC_EXIT",
desc: '''End of computation and exit status register'''
swaccess: "rw",
hwaccess: "hro",
resval: "0",
fields: [{
bits: "31:0",
name: "EOC_EXIT",
desc: "Indicates the end of computation and exit status."
}]
}
]
}
32 changes: 20 additions & 12 deletions hw/system/spatz_cluster/src/spatz_cluster_peripheral/spatz_cluster_peripheral_reg_pkg.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -147,6 +147,10 @@ package spatz_cluster_peripheral_reg_pkg;
logic [31:0] q;
} spatz_cluster_peripheral_reg2hw_cluster_boot_control_reg_t;

typedef struct packed {
logic [31:0] q;
} spatz_cluster_peripheral_reg2hw_cluster_eoc_exit_reg_t;

typedef struct packed {
logic [47:0] d;
} spatz_cluster_peripheral_hw2reg_perf_counter_mreg_t;
Expand All @@ -157,15 +161,16 @@ package spatz_cluster_peripheral_reg_pkg;

// Register -> HW type
typedef struct packed {
spatz_cluster_peripheral_reg2hw_perf_counter_enable_mreg_t [1:0] perf_counter_enable; // [311:250]
spatz_cluster_peripheral_reg2hw_hart_select_mreg_t [1:0] hart_select; // [249:230]
spatz_cluster_peripheral_reg2hw_perf_counter_mreg_t [1:0] perf_counter; // [229:132]
spatz_cluster_peripheral_reg2hw_cl_clint_set_reg_t cl_clint_set; // [131:99]
spatz_cluster_peripheral_reg2hw_cl_clint_clear_reg_t cl_clint_clear; // [98:66]
spatz_cluster_peripheral_reg2hw_hw_barrier_reg_t hw_barrier; // [65:34]
spatz_cluster_peripheral_reg2hw_icache_prefetch_enable_reg_t icache_prefetch_enable; // [33:33]
spatz_cluster_peripheral_reg2hw_spatz_status_reg_t spatz_status; // [32:32]
spatz_cluster_peripheral_reg2hw_cluster_boot_control_reg_t cluster_boot_control; // [31:0]
spatz_cluster_peripheral_reg2hw_perf_counter_enable_mreg_t [1:0] perf_counter_enable; // [343:282]
spatz_cluster_peripheral_reg2hw_hart_select_mreg_t [1:0] hart_select; // [281:262]
spatz_cluster_peripheral_reg2hw_perf_counter_mreg_t [1:0] perf_counter; // [261:164]
spatz_cluster_peripheral_reg2hw_cl_clint_set_reg_t cl_clint_set; // [163:131]
spatz_cluster_peripheral_reg2hw_cl_clint_clear_reg_t cl_clint_clear; // [130:98]
spatz_cluster_peripheral_reg2hw_hw_barrier_reg_t hw_barrier; // [97:66]
spatz_cluster_peripheral_reg2hw_icache_prefetch_enable_reg_t icache_prefetch_enable; // [65:65]
spatz_cluster_peripheral_reg2hw_spatz_status_reg_t spatz_status; // [64:64]
spatz_cluster_peripheral_reg2hw_cluster_boot_control_reg_t cluster_boot_control; // [63:32]
spatz_cluster_peripheral_reg2hw_cluster_eoc_exit_reg_t cluster_eoc_exit; // [31:0]
} spatz_cluster_peripheral_reg2hw_t;

// HW -> register type
Expand All @@ -187,6 +192,7 @@ package spatz_cluster_peripheral_reg_pkg;
parameter logic [BlockAw-1:0] SPATZ_CLUSTER_PERIPHERAL_ICACHE_PREFETCH_ENABLE_OFFSET = 7'h 48;
parameter logic [BlockAw-1:0] SPATZ_CLUSTER_PERIPHERAL_SPATZ_STATUS_OFFSET = 7'h 50;
parameter logic [BlockAw-1:0] SPATZ_CLUSTER_PERIPHERAL_CLUSTER_BOOT_CONTROL_OFFSET = 7'h 58;
parameter logic [BlockAw-1:0] SPATZ_CLUSTER_PERIPHERAL_CLUSTER_EOC_EXIT_OFFSET = 7'h 60;

// Reset values for hwext registers and their fields
parameter logic [47:0] SPATZ_CLUSTER_PERIPHERAL_PERF_COUNTER_0_RESVAL = 48'h 0;
Expand All @@ -208,11 +214,12 @@ package spatz_cluster_peripheral_reg_pkg;
SPATZ_CLUSTER_PERIPHERAL_HW_BARRIER,
SPATZ_CLUSTER_PERIPHERAL_ICACHE_PREFETCH_ENABLE,
SPATZ_CLUSTER_PERIPHERAL_SPATZ_STATUS,
SPATZ_CLUSTER_PERIPHERAL_CLUSTER_BOOT_CONTROL
SPATZ_CLUSTER_PERIPHERAL_CLUSTER_BOOT_CONTROL,
SPATZ_CLUSTER_PERIPHERAL_CLUSTER_EOC_EXIT
} spatz_cluster_peripheral_id_e;

// Register width information to check illegal writes
parameter logic [3:0] SPATZ_CLUSTER_PERIPHERAL_PERMIT [12] = '{
parameter logic [3:0] SPATZ_CLUSTER_PERIPHERAL_PERMIT [13] = '{
4'b 1111, // index[ 0] SPATZ_CLUSTER_PERIPHERAL_PERF_COUNTER_ENABLE_0
4'b 1111, // index[ 1] SPATZ_CLUSTER_PERIPHERAL_PERF_COUNTER_ENABLE_1
4'b 0011, // index[ 2] SPATZ_CLUSTER_PERIPHERAL_HART_SELECT_0
Expand All @@ -224,7 +231,8 @@ package spatz_cluster_peripheral_reg_pkg;
4'b 1111, // index[ 8] SPATZ_CLUSTER_PERIPHERAL_HW_BARRIER
4'b 0001, // index[ 9] SPATZ_CLUSTER_PERIPHERAL_ICACHE_PREFETCH_ENABLE
4'b 0001, // index[10] SPATZ_CLUSTER_PERIPHERAL_SPATZ_STATUS
4'b 1111 // index[11] SPATZ_CLUSTER_PERIPHERAL_CLUSTER_BOOT_CONTROL
4'b 1111, // index[11] SPATZ_CLUSTER_PERIPHERAL_CLUSTER_BOOT_CONTROL
4'b 1111 // index[12] SPATZ_CLUSTER_PERIPHERAL_CLUSTER_EOC_EXIT
};

endpackage
Expand Down
43 changes: 41 additions & 2 deletions hw/system/spatz_cluster/src/spatz_cluster_peripheral/spatz_cluster_peripheral_reg_top.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -281,6 +281,9 @@ module spatz_cluster_peripheral_reg_top #(
logic [31:0] cluster_boot_control_qs;
logic [31:0] cluster_boot_control_wd;
logic cluster_boot_control_we;
logic [31:0] cluster_eoc_exit_qs;
logic [31:0] cluster_eoc_exit_wd;
logic cluster_eoc_exit_we;

// Register instances

Expand Down Expand Up @@ -2120,9 +2123,36 @@ module spatz_cluster_peripheral_reg_top #(
);


// R[cluster_eoc_exit]: V(False)

prim_subreg #(
.DW (32),
.SWACCESS("RW"),
.RESVAL (32'h0)
) u_cluster_eoc_exit (
.clk_i (clk_i ),
.rst_ni (rst_ni ),

// from register interface
.we (cluster_eoc_exit_we),
.wd (cluster_eoc_exit_wd),

// from internal hardware
.de (1'b0),
.d ('0 ),

logic [11:0] addr_hit;
// to internal hardware
.qe (),
.q (reg2hw.cluster_eoc_exit.q ),

// to register interface (read)
.qs (cluster_eoc_exit_qs)
);




logic [12:0] addr_hit;
always_comb begin
addr_hit = '0;
addr_hit[ 0] = (reg_addr == SPATZ_CLUSTER_PERIPHERAL_PERF_COUNTER_ENABLE_0_OFFSET);
Expand All @@ -2137,6 +2167,7 @@ module spatz_cluster_peripheral_reg_top #(
addr_hit[ 9] = (reg_addr == SPATZ_CLUSTER_PERIPHERAL_ICACHE_PREFETCH_ENABLE_OFFSET);
addr_hit[10] = (reg_addr == SPATZ_CLUSTER_PERIPHERAL_SPATZ_STATUS_OFFSET);
addr_hit[11] = (reg_addr == SPATZ_CLUSTER_PERIPHERAL_CLUSTER_BOOT_CONTROL_OFFSET);
addr_hit[12] = (reg_addr == SPATZ_CLUSTER_PERIPHERAL_CLUSTER_EOC_EXIT_OFFSET);
end

assign addrmiss = (reg_re || reg_we) ? ~|addr_hit : 1'b0 ;
Expand All @@ -2155,7 +2186,8 @@ module spatz_cluster_peripheral_reg_top #(
(addr_hit[ 8] & (|(SPATZ_CLUSTER_PERIPHERAL_PERMIT[ 8] & ~reg_be))) |
(addr_hit[ 9] & (|(SPATZ_CLUSTER_PERIPHERAL_PERMIT[ 9] & ~reg_be))) |
(addr_hit[10] & (|(SPATZ_CLUSTER_PERIPHERAL_PERMIT[10] & ~reg_be))) |
(addr_hit[11] & (|(SPATZ_CLUSTER_PERIPHERAL_PERMIT[11] & ~reg_be)))));
(addr_hit[11] & (|(SPATZ_CLUSTER_PERIPHERAL_PERMIT[11] & ~reg_be))) |
(addr_hit[12] & (|(SPATZ_CLUSTER_PERIPHERAL_PERMIT[12] & ~reg_be)))));
end

assign perf_counter_enable_0_cycle_0_we = addr_hit[0] & reg_we & !reg_error;
Expand Down Expand Up @@ -2375,6 +2407,9 @@ module spatz_cluster_peripheral_reg_top #(
assign cluster_boot_control_we = addr_hit[11] & reg_we & !reg_error;
assign cluster_boot_control_wd = reg_wdata[31:0];

assign cluster_eoc_exit_we = addr_hit[12] & reg_we & !reg_error;
assign cluster_eoc_exit_wd = reg_wdata[31:0];

// Read data return
always_comb begin
reg_rdata_next = '0;
Expand Down Expand Up @@ -2487,6 +2522,10 @@ module spatz_cluster_peripheral_reg_top #(
reg_rdata_next[31:0] = cluster_boot_control_qs;
end

addr_hit[12]: begin
reg_rdata_next[31:0] = cluster_eoc_exit_qs;
end

default: begin
reg_rdata_next = '1;
end
Expand Down

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