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[hw/ip/spatz] also buffer rsp from vfu
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Navaneeth-KunhiPurayil committed Dec 19, 2024
1 parent 641e377 commit bfbff14
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Showing 4 changed files with 15 additions and 7 deletions.
18 changes: 12 additions & 6 deletions hw/ip/spatz/src/spatz.sv
Original file line number Diff line number Diff line change
Expand Up @@ -85,8 +85,8 @@ module spatz import spatz_pkg::*; import rvv_pkg::*; import fpnew_pkg::*; #(

logic vfu_req_ready;
logic vfu_rsp_ready;
logic vfu_rsp_valid;
vfu_rsp_t vfu_rsp;
logic vfu_rsp_valid, vfu_rsp_buf_valid;
vfu_rsp_t vfu_rsp, vfu_rsp_buf;

logic vlsu_req_ready;
logic vlsu_rsp_valid;
Expand All @@ -108,6 +108,8 @@ module spatz import spatz_pkg::*; import rvv_pkg::*; import fpnew_pkg::*; #(
vrf_addr_t waddr;
vrf_be_t wbe;
spatz_id_t wid;
vfu_rsp_t rsp;
logic rsp_valid;
} vrf_buf_t;

vrf_buf_t vrf_buf_data;
Expand Down Expand Up @@ -268,9 +270,9 @@ module spatz import spatz_pkg::*; import rvv_pkg::*; import fpnew_pkg::*; #(
.spatz_req_o (spatz_req ),
// VFU
.vfu_req_ready_i (vfu_req_ready ),
.vfu_rsp_valid_i (vfu_rsp_valid ),
.vfu_rsp_valid_i (vfu_rsp_buf_valid ),
.vfu_rsp_ready_o (vfu_rsp_ready ),
.vfu_rsp_i (vfu_rsp ),
.vfu_rsp_i (vfu_rsp_buf ),
// VLSU
.vlsu_req_ready_i (vlsu_req_ready ),
.vlsu_rsp_valid_i (vlsu_rsp_valid ),
Expand All @@ -292,12 +294,16 @@ module spatz import spatz_pkg::*; import rvv_pkg::*; import fpnew_pkg::*; #(
vrf_waddr_buf = vrf_waddr;
vrf_wbe_buf = vrf_wbe;
sb_buf_id = sb_id;
vfu_rsp_buf = vfu_rsp;
vfu_rsp_buf_valid = vfu_rsp_valid;
if (vrf_buf_valid) begin
sb_we_buf [VFU_VD_WD] = 1'b1;
vrf_wdata_buf[VFU_VD_WD] = vrf_buf_data.wdata;
vrf_wdata_buf[VFU_VD_WD] = vrf_buf_data.wdata;
vrf_waddr_buf[VFU_VD_WD] = vrf_buf_data.waddr;
vrf_wbe_buf [VFU_VD_WD] = vrf_buf_data.wbe;
sb_buf_id [SB_VFU_VD_WD] = vrf_buf_data.wid;
vfu_rsp_buf = vrf_buf_data.rsp;
vfu_rsp_buf_valid = vrf_buf_data.rsp_valid;
end
end

Expand Down Expand Up @@ -346,7 +352,7 @@ module spatz import spatz_pkg::*; import rvv_pkg::*; import fpnew_pkg::*; #(

Check warning on line 352 in hw/ip/spatz/src/spatz.sv

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[verible-verilog-lint] hw/ip/spatz/src/spatz.sv#L352

Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
Raw output
message:"Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]"  location:{path:"hw/ip/spatz/src/spatz.sv"  range:{start:{line:352  column:1}}}  severity:WARNING  source:{name:"verible-verilog-lint"  url:"https://github.com/chipsalliance/verible"}  suggestions:{range:{start:{line:352  column:1}  end:{line:353}}  text:"\n"}
.valid_i (vrf_buf_en ),
.ready_o (vrf_buf_ready ),
.data_i ({vrf_wdata[VFU_VD_WD], vrf_waddr[VFU_VD_WD], vrf_wbe[VFU_VD_WD], sb_id[SB_VFU_VD_WD]}),
.data_i ({vrf_wdata[VFU_VD_WD], vrf_waddr[VFU_VD_WD], vrf_wbe[VFU_VD_WD], sb_id[SB_VFU_VD_WD], vfu_rsp, vfu_rsp_valid}),

.valid_o (vrf_buf_valid ),
.ready_i (vrf_wvalid[VFU_VD_WD] ),
Expand Down
1 change: 1 addition & 0 deletions hw/ip/spatz/src/spatz_controller.sv
Original file line number Diff line number Diff line change
Expand Up @@ -435,6 +435,7 @@ module spatz_controller
// Track request vl for vector chaining
// TODO: split the vector length here properly based on number of FPUs, EW, vstart, etc...
vl_max_d[spatz_req.id] = (spatz_req.vl >> 1) << spatz_req.vtype.vsew;
vl_cnt_d[spatz_req.id] = '0;
end

// An instruction never depends on itself
Expand Down
2 changes: 1 addition & 1 deletion hw/ip/spatz/src/spatz_vlsu.sv
Original file line number Diff line number Diff line change
Expand Up @@ -950,7 +950,7 @@ module spatz_vlsu
// Store operation
end else begin
// Read new element from the register file and store it to the buffer
if (state_q == VLSU_RunningStore && !(|rob_full) && |commit_operation_valid) begin
if (state_q == VLSU_RunningStore && !(|rob_full) && |commit_operation_valid[intf]) begin
vrf_re_o[intf][0] = 1'b1;

for (int unsigned fu = 0; fu < N_FU; fu++) begin
Expand Down
1 change: 1 addition & 0 deletions sw/spatzBenchmarks/dp-faxpy/main.c
Original file line number Diff line number Diff line change
Expand Up @@ -61,6 +61,7 @@ int main() {

snrt_dma_start_1d(x, axpy_X_dram, dim * sizeof(double));
snrt_dma_start_1d(y, axpy_Y_dram, dim * sizeof(double));
snrt_dma_wait_all();
}

// Wait for all cores to finish
Expand Down

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