Merge branch 'Diyou/mempool-spatz' into 'main'

MemPool-Spatz See merge request spatz/spatz!45
pulp-platform · Jan 30, 2024 · 505f1b0 · 505f1b0
2 parents 254daf4 + bc56423
commit 505f1b0
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diff --git a/Bender.yml b/Bender.yml
@@ -18,179 +18,187 @@ dependencies:
   tech_cells_generic: { git: "https://github.com/pulp-platform/tech_cells_generic.git", version: 0.2.11         }
 
 export_include_dirs:
+  - hw/ip/reqrsp_interface/include
   - hw/ip/mem_interface/include
   - hw/ip/snitch/include
-  - hw/ip/reqrsp_interface/include
   - hw/ip/tcdm_interface/include
 
 sources:
 
   ## hw/ip/reqrsp_interface ##
-
-  # Level 0:
-  - hw/ip/reqrsp_interface/src/reqrsp_pkg.sv
-  # Level 1:
-  - hw/ip/reqrsp_interface/src/reqrsp_intf.sv
-  # Level 2:
-  - hw/ip/reqrsp_interface/src/axi_to_reqrsp.sv
-  - hw/ip/reqrsp_interface/src/reqrsp_cut.sv
-  - hw/ip/reqrsp_interface/src/reqrsp_demux.sv
-  - hw/ip/reqrsp_interface/src/reqrsp_iso.sv
-  - hw/ip/reqrsp_interface/src/reqrsp_mux.sv
-  - hw/ip/reqrsp_interface/src/reqrsp_to_axi.sv
-  - target: simulation
-    files:
-      - hw/ip/reqrsp_interface/src/reqrsp_test.sv
-  - target: test
+  - target: not(mempool)
     files:
-      # Level 0
-      - hw/ip/reqrsp_interface/test/axi_to_reqrsp_tb.sv
-      - hw/ip/reqrsp_interface/test/reqrsp_demux_tb.sv
-      - hw/ip/reqrsp_interface/test/reqrsp_idempotent_tb.sv
-      - hw/ip/reqrsp_interface/test/reqrsp_mux_tb.sv
-      - hw/ip/reqrsp_interface/test/reqrsp_to_axi_tb.sv
-
-  ## hw/ip/mem_interface ##
+    # Level 0:
+    - hw/ip/reqrsp_interface/src/reqrsp_pkg.sv
+    # Level 1:
+    - hw/ip/reqrsp_interface/src/reqrsp_intf.sv
+    # Level 2:
+    - hw/ip/reqrsp_interface/src/axi_to_reqrsp.sv
+    - hw/ip/reqrsp_interface/src/reqrsp_cut.sv
+    - hw/ip/reqrsp_interface/src/reqrsp_demux.sv
+    - hw/ip/reqrsp_interface/src/reqrsp_iso.sv
+    - hw/ip/reqrsp_interface/src/reqrsp_mux.sv
+    - hw/ip/reqrsp_interface/src/reqrsp_to_axi.sv
+    - target: simulation
+      files:
+        - hw/ip/reqrsp_interface/src/reqrsp_test.sv
+    - target: test
+      files:
+        # Level 0
+        - hw/ip/reqrsp_interface/test/axi_to_reqrsp_tb.sv
+        - hw/ip/reqrsp_interface/test/reqrsp_demux_tb.sv
+        - hw/ip/reqrsp_interface/test/reqrsp_idempotent_tb.sv
+        - hw/ip/reqrsp_interface/test/reqrsp_mux_tb.sv
+        - hw/ip/reqrsp_interface/test/reqrsp_to_axi_tb.sv
+
+    ## hw/ip/mem_interface ##
+
+    - hw/ip/mem_interface/src/mem_wide_narrow_mux.sv
+    - hw/ip/mem_interface/src/mem_interface.sv
+    - target: simulation
+      files:
+        - hw/ip/mem_interface/src/mem_test.sv
+    - target: test
+      files:
+        # Level 0
+        - hw/ip/mem_interface/test/mem_wide_narrow_mux_tb.sv
+
+    ## hw/ip/tcdm_interface ##
+
+    # Level 0
+    - hw/ip/tcdm_interface/src/tcdm_interface.sv
+    # Level 1
+    - hw/ip/tcdm_interface/src/axi_to_tcdm.sv
+    - hw/ip/tcdm_interface/src/reqrsp_to_tcdm.sv
+    - hw/ip/tcdm_interface/src/tcdm_mux.sv
+    - target: simulation
+      files:
+        - hw/ip/tcdm_interface/src/tcdm_test.sv
+    - target: test
+      files:
+        # Level 0
+        - hw/ip/tcdm_interface/test/reqrsp_to_tcdm_tb.sv
+        - hw/ip/tcdm_interface/test/tcdm_mux_tb.sv
+
+    ## hw/ip/snitch ##
+
+    # Level 0:
+    - hw/ip/snitch/src/snitch_pma_pkg.sv
+    - hw/ip/snitch/src/riscv_instr.sv
+    # Level 1:
+    - hw/ip/snitch/src/snitch_pkg.sv
+    # Level 2:
+    - hw/ip/snitch/src/snitch_regfile_ff.sv
+    # - hw/ip/snitch/src/snitch_regfile_fpga.sv
+    # - hw/ip/snitch/src/snitch_regfile_latch.sv
+    - hw/ip/snitch/src/snitch_lsu.sv
+    - hw/ip/snitch/src/snitch_l0_tlb.sv
+    # Level 1:
+    - target: not(disable_pmcs)
+      defines:
+        SNITCH_ENABLE_PERF:
+      files:
+        - hw/ip/snitch/src/snitch.sv
+    # Disable the performance monitoring counters to save area.
+    - target: disable_pmcs
+      files:
+        - hw/ip/snitch/src/snitch.sv
+
+    - target: test
+      files:
+        - hw/ip/snitch/test/snitch_l0_tlb_tb.sv
+
+    ## hw/ip/snitch_icache ##
+
+    # Level 0:
+    - hw/ip/snitch_icache/src/snitch_icache_pkg.sv
+    # Level 1:
+    - hw/ip/snitch_icache/src/snitch_icache_l0.sv
+    - hw/ip/snitch_icache/src/snitch_icache_refill.sv
+    - hw/ip/snitch_icache/src/snitch_icache_lfsr.sv
+    - hw/ip/snitch_icache/src/snitch_icache_lookup.sv
+    # Level 2:
+    - hw/ip/snitch_icache/src/snitch_icache_handler.sv
+    # Level 3:
+    - hw/ip/snitch_icache/src/snitch_icache.sv
+    - target: test
+      files:
+        - hw/ip/snitch_icache/test/snitch_icache_l0_tb.sv
+
+    ## hw/ip/snitch_test ##
+
+    # Level 1:
+    - target: any(simulation, verilator)
+      files:
+        - hw/ip/snitch_test/src/tb_memory_regbus.sv
+        # Level 2
+        - hw/ip/snitch_test/src/tb_memory_axi.sv
+    # Level 3:
+    - target: snitch_test
+      files:
+        - hw/ip/snitch_test/src/tb_bin.sv
 
-  - hw/ip/mem_interface/src/mem_wide_narrow_mux.sv
-  - hw/ip/mem_interface/src/mem_interface.sv
-  - target: simulation
-    files:
-      - hw/ip/mem_interface/src/mem_test.sv
-  - target: test
+  ## hw/ip/spatz ##
+  - target: spatz
     files:
-      # Level 0
-      - hw/ip/mem_interface/test/mem_wide_narrow_mux_tb.sv
-
-  ## hw/ip/tcdm_interface ##
+    # Level 0
+    - hw/ip/spatz/src/reorder_buffer.sv
+    - hw/ip/spatz/src/rvv_pkg.sv
+    # Level 1
+    - hw/ip/spatz/src/generated/spatz_pkg.sv
+
+    - hw/ip/spatz/src/spatz_serdiv.sv
+    # Level 2
+    - hw/ip/spatz/src/spatz_decoder.sv
+    - hw/ip/spatz/src/spatz_simd_lane.sv
+    - hw/ip/spatz/src/vregfile.sv
+    # Level 3
+    - hw/ip/spatz/src/spatz_fpu_sequencer.sv
+    - hw/ip/spatz/src/spatz_ipu.sv
+    - hw/ip/spatz/src/spatz_vfu.sv
+    - hw/ip/spatz/src/spatz_vlsu.sv
+    - hw/ip/spatz/src/spatz_vrf.sv
+    - hw/ip/spatz/src/spatz_vsldu.sv
+    # Level 4
+    - hw/ip/spatz/src/spatz_controller.sv
+    # Level 5
+    - hw/ip/spatz/src/spatz.sv
+    # Level 6
+    - target: mempool
+      files:
+      - hw/ip/spatz_cc/src/spatz_mempool_cc.sv
 
-  # Level 0
-  - hw/ip/tcdm_interface/src/tcdm_interface.sv
-  # Level 1
-  - hw/ip/tcdm_interface/src/axi_to_tcdm.sv
-  - hw/ip/tcdm_interface/src/reqrsp_to_tcdm.sv
-  - hw/ip/tcdm_interface/src/tcdm_mux.sv
-  - target: simulation
-    files:
-      - hw/ip/tcdm_interface/src/tcdm_test.sv
-  - target: test
-    files:
+  ## hw/ip/spatz_cc ##
+    - target: not(mempool)
+      files:
       # Level 0
-      - hw/ip/tcdm_interface/test/reqrsp_to_tcdm_tb.sv
-      - hw/ip/tcdm_interface/test/tcdm_mux_tb.sv
-
-  ## hw/ip/snitch ##
-
-  # Level 0:
-  - hw/ip/snitch/src/snitch_pma_pkg.sv
-  - hw/ip/snitch/src/riscv_instr.sv
-  # Level 1:
-  - hw/ip/snitch/src/snitch_pkg.sv
-  # Level 2:
-  - hw/ip/snitch/src/snitch_regfile_ff.sv
-  # - hw/ip/snitch/src/snitch_regfile_fpga.sv
-  # - hw/ip/snitch/src/snitch_regfile_latch.sv
-  - hw/ip/snitch/src/snitch_lsu.sv
-  - hw/ip/snitch/src/snitch_l0_tlb.sv
-  # Level 1:
-  - target: not(disable_pmcs)
-    defines:
-      SNITCH_ENABLE_PERF:
-    files:
-      - hw/ip/snitch/src/snitch.sv
-  # Disable the performance monitoring counters to save area.
-  - target: disable_pmcs
-    files:
-      - hw/ip/snitch/src/snitch.sv
-
-  - target: test
-    files:
-      - hw/ip/snitch/test/snitch_l0_tlb_tb.sv
-
-  ## hw/ip/snitch_icache ##
-
-  # Level 0:
-  - hw/ip/snitch_icache/src/snitch_icache_pkg.sv
-  # Level 1:
-  - hw/ip/snitch_icache/src/snitch_icache_l0.sv
-  - hw/ip/snitch_icache/src/snitch_icache_refill.sv
-  - hw/ip/snitch_icache/src/snitch_icache_lfsr.sv
-  - hw/ip/snitch_icache/src/snitch_icache_lookup.sv
-  # Level 2:
-  - hw/ip/snitch_icache/src/snitch_icache_handler.sv
-  # Level 3:
-  - hw/ip/snitch_icache/src/snitch_icache.sv
-  - target: test
-    files:
-      - hw/ip/snitch_icache/test/snitch_icache_l0_tb.sv
-
-  ## hw/ip/snitch_test ##
-
-  # Level 1:
-  - target: any(simulation, verilator)
-    files:
-      - hw/ip/snitch_test/src/tb_memory_regbus.sv
+      - hw/ip/spatz_cc/src/axi_dma_pkg.sv
+      # Level 1
+      - hw/ip/spatz_cc/src/axi_dma_perf_counters.sv
+      - hw/ip/spatz_cc/src/axi_dma_twod_ext.sv
       # Level 2
-      - hw/ip/snitch_test/src/tb_memory_axi.sv
-  # Level 3:
-  - target: snitch_test
-    files:
-      - hw/ip/snitch_test/src/tb_bin.sv
+      - hw/ip/spatz_cc/src/axi_dma_tc_snitch_fe.sv
+      # Level 3
+      - hw/ip/spatz_cc/src/spatz_cc.sv
 
-  ## hw/ip/spatz ##
-
-  # Level 0
-  - hw/ip/spatz/src/reorder_buffer.sv
-  - hw/ip/spatz/src/rvv_pkg.sv
-  # Level 1
-  - hw/ip/spatz/src/generated/spatz_pkg.sv
-  - hw/ip/spatz/src/spatz_serdiv.sv
-  # Level 2
-  - hw/ip/spatz/src/spatz_decoder.sv
-  - hw/ip/spatz/src/spatz_simd_lane.sv
-  - hw/ip/spatz/src/vregfile.sv
-  # Level 3
-  - hw/ip/spatz/src/spatz_fpu_sequencer.sv
-  - hw/ip/spatz/src/spatz_ipu.sv
-  - hw/ip/spatz/src/spatz_vfu.sv
-  - hw/ip/spatz/src/spatz_vlsu.sv
-  - hw/ip/spatz/src/spatz_vrf.sv
-  - hw/ip/spatz/src/spatz_vsldu.sv
-  # Level 4
-  - hw/ip/spatz/src/spatz_controller.sv
-  # Level 5
-  - hw/ip/spatz/src/spatz.sv
-
-  ## hw/ip/spatz_cc ##
+      ## system/spatz_cluster ##
 
-  # Level 0
-  - hw/ip/spatz_cc/src/axi_dma_pkg.sv
-  # Level 1
-  - hw/ip/spatz_cc/src/axi_dma_perf_counters.sv
-  - hw/ip/spatz_cc/src/axi_dma_twod_ext.sv
-  # Level 2
-  - hw/ip/spatz_cc/src/axi_dma_tc_snitch_fe.sv
-  # Level 3
-  - hw/ip/spatz_cc/src/spatz_cc.sv
-
-  ## system/spatz_cluster ##
-
-  # Level 0
-  - hw/system/spatz_cluster/src/generated/bootrom.sv
-  - hw/system/spatz_cluster/src/spatz_amo_shim.sv
-  - hw/system/spatz_cluster/src/spatz_cluster_peripheral/spatz_cluster_peripheral_reg_pkg.sv
-  - hw/system/spatz_cluster/src/spatz_tcdm_interconnect.sv
-  # Level 1
-  - hw/system/spatz_cluster/src/spatz_barrier.sv
-  - hw/system/spatz_cluster/src/spatz_cluster_peripheral/spatz_cluster_peripheral_reg_top.sv
-  # Level 2
-  - hw/system/spatz_cluster/src/spatz_cluster_peripheral/spatz_cluster_peripheral.sv
-  # Level 3
-  - hw/system/spatz_cluster/src/spatz_cluster.sv
-  # Level 4
-  - hw/system/spatz_cluster/src/generated/spatz_cluster_wrapper.sv
-
-  - target: spatz_test
-    files:
+      # Level 0
+      - hw/system/spatz_cluster/src/generated/bootrom.sv
+      - hw/system/spatz_cluster/src/spatz_amo_shim.sv
+      - hw/system/spatz_cluster/src/spatz_cluster_peripheral/spatz_cluster_peripheral_reg_pkg.sv
+      - hw/system/spatz_cluster/src/spatz_tcdm_interconnect.sv
       # Level 1
-      - hw/system/spatz_cluster/tb/testharness.sv
+      - hw/system/spatz_cluster/src/spatz_barrier.sv
+      - hw/system/spatz_cluster/src/spatz_cluster_peripheral/spatz_cluster_peripheral_reg_top.sv
+      # Level 2
+      - hw/system/spatz_cluster/src/spatz_cluster_peripheral/spatz_cluster_peripheral.sv
+      # Level 3
+      - hw/system/spatz_cluster/src/spatz_cluster.sv
+      # Level 4
+      - hw/system/spatz_cluster/src/generated/spatz_cluster_wrapper.sv
+
+      - target: spatz_test
+        files:
+          # Level 1
+          - hw/system/spatz_cluster/tb/testharness.sv
diff --git a/hw/ip/spatz/src/generated/spatz_pkg.sv b/hw/ip/spatz/src/generated/spatz_pkg.sv
@@ -339,16 +339,20 @@ package spatz_pkg;
     Width        : ELEN,
     EnableVectors: 1'b1,
     EnableNanBox : 1'b1,
+    //              FP32  FP64  FP16  FP8   FP16a FP8a
     FpFmtMask    : {1'b1, 1'b1, 1'b1, 1'b1, 1'b1, 1'b1},
+    //              INT8  INT16 INT32 INT64
     IntFmtMask   : {1'b1, 1'b1, 1'b1, 1'b1}
   } :
   // Single Precision FPU
   '{
     Width        : ELEN,
     EnableVectors: 1'b1,
     EnableNanBox : 1'b1,
-    FpFmtMask    : {RVF, 1'b0, 1'b1, 1'b0, 1'b0, 1'b0},
-    IntFmtMask   : {1'b0, 1'b1, 1'b1, 1'b0}
+    //              FP32  FP64  FP16  FP8   FP16a FP8a
+    FpFmtMask    : {RVF,  1'b0, 1'b1, 1'b1, 1'b0, 1'b0},
+    //              INT8  INT16 INT32 INT64
+    IntFmtMask   : {1'b1, 1'b1, 1'b1, 1'b0}
   };
 
   // FP format conversion