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fix traces
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Mattia Sinigaglia committed Sep 19, 2024
1 parent 6abaa04 commit 3eb8c92
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Showing 2 changed files with 7 additions and 7 deletions.
2 changes: 1 addition & 1 deletion hw/ip/spatz_cc/src/spatz_cc.sv
Original file line number Diff line number Diff line change
Expand Up @@ -478,7 +478,7 @@ module spatz_cc
// pragma translate_off
int f;
string fn;
logic [63:0] cycle;
logic [63:0] cycle= '0;

initial begin
// We need to schedule the assignment into a safe region, otherwise
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12 changes: 6 additions & 6 deletions util/Makefrag
Original file line number Diff line number Diff line change
Expand Up @@ -159,15 +159,15 @@ work-vcs/compile.sh: ${VSIM_SOURCES} ${TB_SRCS}
########

.PHONY: traces
traces: $(shell (ls bin/logs/trace_hart_*.dasm 2>/dev/null | sed 's/\.dasm/\.txt/') || echo "")
traces: $(shell (ls logs/trace_hart_*.dasm 2>/dev/null | sed 's/\.dasm/\.txt/') || echo "")

bin/logs/trace_hart_%.txt: bin/logs/trace_hart_%.dasm ${ROOT}/util/gen_trace.py
logs/trace_hart_%.txt: logs/trace_hart_%.dasm ${ROOT}/util/gen_trace.py
$(DASM) < $< | $(PYTHON) ${ROOT}/util/gen_trace.py > $@

# make annotate
# Generate source-code interleaved traces for all harts. Reads the binary from
# the bin/logs/.rtlbinary file that is written at start of simulation in the vsim script
bin/logs/trace_hart_%.s: bin/logs/trace_hart_%.txt ${ROOT}/util/trace/annotate.py
# the logs/.rtlbinary file that is written at start of simulation in the vsim script
logs/trace_hart_%.s: logs/trace_hart_%.txt ${ROOT}/util/trace/annotate.py
$(PYTHON) ${ROOT}/util/trace/annotate.py -q -o $@ $(BINARY) $<
BINARY ?= $(shell cat bin/logs/.rtlbinary)
annotate: $(shell (ls bin/logs/trace_hart_*.dasm 2>/dev/null | sed 's/\.dasm/\.s/') || echo "")
BINARY ?= $(shell cat logs/.rtlbinary)
annotate: $(shell (ls logs/trace_hart_*.dasm 2>/dev/null | sed 's/\.dasm/\.s/') || echo "")

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