Add missing break in main.c #2207
reviewdog [verible-verilog-lint] report
reported by reviewdog 🐶
Findings (3)
hw/snitch_ssr/src/snitch_ssr_addr_gen.sv|193 col 101| Line length exceeds max: 100; is: 103 [Style: line-length] [line-length]
hw/snitch/src/snitch.sv|2762 col 101| Line length exceeds max: 100; is: 105 [Style: line-length] [line-length]
hw/snitch/src/snitch.sv|2766 col 101| Line length exceeds max: 100; is: 103 [Style: line-length] [line-length]
Filtered Findings (0)
Annotations
Check warning on line 193 in hw/snitch_ssr/src/snitch_ssr_addr_gen.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/snitch_ssr/src/snitch_ssr_addr_gen.sv#L193
Line length exceeds max: 100; is: 103 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 103 [Style: line-length] [line-length]" location:{path:"./hw/snitch_ssr/src/snitch_ssr_addr_gen.sv" range:{start:{line:193 column:101}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 2762 in hw/snitch/src/snitch.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/snitch/src/snitch.sv#L2762
Line length exceeds max: 100; is: 105 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 105 [Style: line-length] [line-length]" location:{path:"./hw/snitch/src/snitch.sv" range:{start:{line:2762 column:101}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 2766 in hw/snitch/src/snitch.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/snitch/src/snitch.sv#L2766
Line length exceeds max: 100; is: 103 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 103 [Style: line-length] [line-length]" location:{path:"./hw/snitch/src/snitch.sv" range:{start:{line:2766 column:101}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}