hw: Rename bootrom to snitch_bootrom
#1972
reviewdog [verible-verilog-lint] report
reported by reviewdog 🐶
Findings (4)
hw/snitch_cluster/src/snitch_cluster_peripheral/snitch_cluster_peripheral_reg_top.sv|17970 col 26| Non-type localparam names must be styled with CamelCase [Style: constants] [parameter-name-style]
hw/snitch_cluster/src/snitch_cluster_peripheral/snitch_cluster_peripheral_reg_top.sv|17983 col 1| Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
hw/snitch_cluster/src/snitch_cluster_peripheral/snitch_cluster_peripheral_reg_top.sv|17988 col 1| Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
hw/snitch_cluster/src/snitch_cluster_peripheral/snitch_cluster_peripheral_reg_top.sv|18003 col 1| Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
Filtered Findings (0)
Annotations
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/snitch_cluster/src/snitch_cluster_peripheral/snitch_cluster_peripheral_reg_top.sv#L17970
Non-type localparam names must be styled with CamelCase [Style: constants] [parameter-name-style]
Raw output
message:"Non-type localparam names must be styled with CamelCase [Style: constants] [parameter-name-style]" location:{path:"./hw/snitch_cluster/src/snitch_cluster_peripheral/snitch_cluster_peripheral_reg_top.sv" range:{start:{line:17970 column:26}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/snitch_cluster/src/snitch_cluster_peripheral/snitch_cluster_peripheral_reg_top.sv#L17983
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
Raw output
message:"Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]" location:{path:"./hw/snitch_cluster/src/snitch_cluster_peripheral/snitch_cluster_peripheral_reg_top.sv" range:{start:{line:17983 column:1}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"} suggestions:{range:{start:{line:17983 column:1} end:{line:17984}} text:"\n"}
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/snitch_cluster/src/snitch_cluster_peripheral/snitch_cluster_peripheral_reg_top.sv#L17988
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
Raw output
message:"Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]" location:{path:"./hw/snitch_cluster/src/snitch_cluster_peripheral/snitch_cluster_peripheral_reg_top.sv" range:{start:{line:17988 column:1}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"} suggestions:{range:{start:{line:17988 column:1} end:{line:17989}} text:"\n"}
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/snitch_cluster/src/snitch_cluster_peripheral/snitch_cluster_peripheral_reg_top.sv#L18003
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
Raw output
message:"Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]" location:{path:"./hw/snitch_cluster/src/snitch_cluster_peripheral/snitch_cluster_peripheral_reg_top.sv" range:{start:{line:18003 column:1}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"} suggestions:{range:{start:{line:18003 column:1} end:{line:18004}} text:"\n"}