Add tile transpose, snrt_dma_*_2d_tile_transpose, fctptr for load/sto… #1078
GitHub Actions / verible-verilog-lint
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Feb 6, 2024 in 1s
reviewdog [verible-verilog-lint] report
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Findings (2)
hw/future/src/dma/axi_dma_backend.sv|562 col 1| Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
hw/snitch_cluster/src/snitch_cc.sv|899 col 101| Line length exceeds max: 100; is: 130 [Style: line-length] [line-length]
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Annotations
Check warning on line 562 in hw/future/src/dma/axi_dma_backend.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/future/src/dma/axi_dma_backend.sv#L562
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
Raw output
message:"Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]" location:{path:"./hw/future/src/dma/axi_dma_backend.sv" range:{start:{line:562 column:1}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"} suggestions:{range:{start:{line:562 column:1} end:{line:563}} text:"\n"}
Check warning on line 899 in hw/snitch_cluster/src/snitch_cc.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/snitch_cluster/src/snitch_cc.sv#L899
Line length exceeds max: 100; is: 130 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 130 [Style: line-length] [line-length]" location:{path:"./hw/snitch_cluster/src/snitch_cc.sv" range:{start:{line:899 column:101}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
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