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target/common: Scale verilator testbench time precision as picoseconds #58

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merged 4 commits into from
Nov 6, 2023

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Raragyay
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@Raragyay Raragyay commented Oct 24, 2023

Fixes #57

Currently, Verilator relies on the global function sc_time_stamp to implement the $time function in verilog. $time is used by the simulator's trace and the performance tooling in the repo to track performance. However, although the current implementation of the testbench increments the time counter on each cycle, it is still dividing this time counter by 1e9. With the default assumption of 1 cycle taking 1ns and time precision of 1ps, this would imply that we are representing the sim::TIME variable as being in attoseconds (1e18 attoseconds = 1 second). This PR instead scales the time variable to return the expected picosecond precision.

Reference example from Verilator 4.100 where no multiplication by 1e-9 takes place: https://github.com/verilator/verilator/blob/v4.100/examples/make_tracing_c/sim_main.cpp

Expected result: time = cycle *1000 + 3000. When generating traces in gen_trace.py we assume that the time is in milliseconds, so it gives a good enough approximation. A next step could be to have wall time instead, but ultimately I think this leaves the verilator simulator in a better state than before.

Example logs generated after the patch attached.

trace_hart_00000000.txt
perf.csv
hart_00000000_perf.json
event.csv

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colluca commented Oct 25, 2023

Thanks for the contribution @Raragyay.

The RTL testbench uses a time precision of 1ps, hence the simulation times in the trace in picoseconds. We also generally assume a 1ns clock period. Ideally, we want to align the Verilator time to these default settings, i.e.:

time = 1000*cycle + <anything>

I would merge your contribution with these changes altogether.

@Raragyay Raragyay force-pushed the bugfix/verilator-sim-time branch from 1cd8832 to eebc97a Compare October 25, 2023 13:25
@Raragyay Raragyay changed the title target/common: Undo nanosecond scaling of time in Verilator testbench target/common: Scale verilator testbench time precision as picoseconds Oct 25, 2023
@colluca
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colluca commented Oct 26, 2023

Hi @Raragyay,

Could you fix the formatting as suggested in the C linting action? https://github.com/pulp-platform/snitch_cluster/actions/runs/6641088274/job/18043051127?pr=58#step:4:27

@Raragyay
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Hi @Raragyay,

Could you fix the formatting as suggested in the C linting action? https://github.com/pulp-platform/snitch_cluster/actions/runs/6641088274/job/18043051127?pr=58#step:4:27

Will get onto it once I get back on dry land! Thank you for the reminder 🙂

@colluca
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colluca commented Nov 6, 2023

Thanks for the contribution @Raragyay!

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Verilator testbench: time is always 0 in DASM and perf results
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