target: Improve reusability of Questa Make targets (#99)

target/common/common.mk

@@ -11,6 +11,9 @@ TB_DIR   ?= $(SNITCH_ROOT)/target/common/test
 UTIL_DIR ?= $(SNITCH_ROOT)/util
 LOGS_DIR  = $(SIM_DIR)/logs
 
+# Files
+BENDER_LOCK ?= $(ROOT)/Bender.lock
+
 # SEPP packages
 QUESTA_SEPP    ?=
 VCS_SEPP       ?=
@@ -167,38 +170,6 @@ define VERILATE
 	touch $@
 endef
 
-############
-# Modelsim #
-############
-
-$(VSIM_BUILDDIR):
-	mkdir -p $@
-
-# Expects vlog/vcom script in $< (e.g. as output by bender)
-# Expects the top module name in $1
-# Produces a binary used to run the simulation at the path specified by $@
-define QUESTASIM
-	${VSIM} -c -do "source $<; quit" | tee $(dir $<)vlog.log
-	@! grep -P "Errors: [1-9]*," $(dir $<)vlog.log
-	$(VOPT) $(VOPT_FLAGS) -work $(VSIM_BUILDDIR) $1 -o $(1)_opt | tee $(dir $<)vopt.log
-	@! grep -P "Errors: [1-9]*," $(dir $<)vopt.log
-	@mkdir -p $(dir $@)
-	@echo "#!/bin/bash" > $@
-	@echo 'binary=$$(realpath $$1)' >> $@
-	@echo 'echo $$binary > .rtlbinary' >> $@
-	@echo '${VSIM} +permissive ${VSIM_FLAGS} $$3 -work ${MKFILE_DIR}/${VSIM_BUILDDIR} -c \
-				-ldflags "-Wl,-rpath,${FESVR}/lib -L${FESVR}/lib -lfesvr -lutil" \
-				$(1)_opt +permissive-off ++$$binary ++$$2' >> $@
-	@chmod +x $@
-	@echo "#!/bin/bash" > [email protected]
-	@echo 'binary=$$(realpath $$1)' >> $@.gui
-	@echo 'echo $$binary > .rtlbinary' >> $@.gui
-	@echo '${VSIM} +permissive ${VSIM_FLAGS} -work ${MKFILE_DIR}/${VSIM_BUILDDIR} \
-				-ldflags "-Wl,-rpath,${FESVR}/lib -L${FESVR}/lib -lfesvr -lutil" \
-				$(1)_opt +permissive-off ++$$binary ++$$2' >> $@.gui
-	@chmod +x $@.gui
-endef
-
 #######
 # VCS #
 #######

target/common/test/tb_bin.cc

@@ -7,15 +7,14 @@
 #include "sim.hh"
 
 int main(int argc, char **argv, char **env) {
-    // Write binary path to logs/binary for the `make annotate` target
+    // Write binary path to .rtlbinary for the `make annotate` target
     FILE *fd;
-    fd = fopen("logs/.rtlbinary", "w");
+    fd = fopen(".rtlbinary", "w");
     if (fd != NULL && argc >= 2) {
         fprintf(fd, "%s\n", argv[1]);
         fclose(fd);
     } else {
-        fprintf(stderr,
-                "Warning: Failed to write binary name to logs/.rtlbinary\n");
+        fprintf(stderr, "Warning: Failed to write binary name to .rtlbinary\n");
     }
 
     auto sim = std::make_unique<sim::Sim>(argc, argv);

target/common/vsim.mk

@@ -0,0 +1,41 @@
+# Copyright 2024 ETH Zurich and University of Bologna.
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+$(VSIM_BUILDDIR):
+	mkdir -p $@
+
+$(VSIM_BUILDDIR)/compile.vsim.tcl: $(BENDER_LOCK) | $(VSIM_BUILDDIR)
+	$(VLIB) $(dir $@)
+	$(BENDER) script vsim $(VSIM_BENDER) --vlog-arg="$(VLOG_FLAGS) -work $(dir $@) " > $@
+	echo '$(VLOG) -work $(dir $@) $(TB_CC_SOURCES) -vv -ccflags "$(TB_CC_FLAGS)"' >> $@
+	echo 'return 0' >> $@
+
+$(BIN_DIR):
+	mkdir -p $@
+
+# Build compilation script and compile all sources for Questasim simulation
+$(BIN_DIR)/$(TARGET).vsim: $(VSIM_BUILDDIR)/compile.vsim.tcl $(VSIM_SOURCES) $(TB_SRCS) $(TB_CC_SOURCES) work/lib/libfesvr.a | $(BIN_DIR)
+	$(VSIM) -c -do "source $<; quit" | tee $(dir $<)vlog.log
+	@! grep -P "Errors: [1-9]*," $(dir $<)vlog.log
+	$(VOPT) $(VOPT_FLAGS) -work $(VSIM_BUILDDIR) tb_bin -o tb_bin_opt | tee $(dir $<)vopt.log
+	@! grep -P "Errors: [1-9]*," $(dir $<)vopt.log
+	@echo "#!/bin/bash" > $@
+	@echo 'binary=$$(realpath $$1)' >> $@
+	@echo 'echo $$binary > .rtlbinary' >> $@
+	@echo '$(VSIM) +permissive $(VSIM_FLAGS) $$3 -work $(MKFILE_DIR)/$(VSIM_BUILDDIR) -c \
+				-ldflags "-Wl,-rpath,$(FESVR)/lib -L$(FESVR)/lib -lfesvr -lutil" \
+				tb_bin_opt +permissive-off ++$$binary ++$$2' >> $@
+	@chmod +x $@
+	@echo "#!/bin/bash" > $@.gui
+	@echo 'binary=$$(realpath $$1)' >> $@.gui
+	@echo 'echo $$binary > .rtlbinary' >> $@.gui
+	@echo '$(VSIM) +permissive $(VSIM_FLAGS) -work $(MKFILE_DIR)/$(VSIM_BUILDDIR) \
+				-ldflags "-Wl,-rpath,$(FESVR)/lib -L$(FESVR)/lib -lfesvr -lutil" \
+				tb_bin_opt +permissive-off ++$$binary ++$$2' >> [email protected]
+	@chmod +x $@.gui
+
+# Clean all build directories and temporary files for Questasim simulation
+.PHONY: clean-vsim
+clean-vsim: clean-work
+	rm -rf $(BIN_DIR)/$(TARGET).vsim $(BIN_DIR)/$(TARGET).vsim.gui $(VSIM_BUILDDIR) vsim.wlf

target/snitch_cluster/Makefile

@@ -27,6 +27,8 @@ MKFILE_DIR  := $(dir $(MKFILE_PATH))
 ROOT        := ${MKFILE_DIR}../..
 SNITCH_ROOT := $(ROOT)
 
+TARGET = snitch_cluster
+
 include $(ROOT)/target/common/common.mk
 
 ############
@@ -42,6 +44,7 @@ CLUSTER_GEN_SRC ?= $(wildcard $(ROOT)/util/clustergen/*.py)
 #########################
 
 SW_DIR             = sw
+BIN_DIR           ?= bin
 TARGET_C_HDRS_DIR ?= $(SW_DIR)/runtime/common
 GENERATED_DIR     ?= $(MKFILE_DIR)generated
 
@@ -203,9 +206,9 @@ $(GENERATED_DIR)/bootdata.cc: ${CFG} ${CLUSTER_GEN_PREREQ} | $(GENERATED_DIR)
 
 .PHONY: clean-vlt
 
-# Clean all build directories and temporary files for Questasim simulation
+# Clean all build directories and temporary files for Verilator simulation
 clean-vlt: clean-work
-	rm -rf bin/snitch_cluster.vlt $(VLT_BUILDDIR)
+	rm -rf $(BIN_DIR)/$(TARGET).vlt $(VLT_BUILDDIR)
 
 $(VLT_AR): ${VLT_SOURCES} ${TB_SRCS}
 	$(call VERILATE,testharness)
@@ -224,37 +227,15 @@ $(VLT_BUILDDIR)/generated/%.o: $(GENERATED_DIR)/%.cc ${VLT_BUILDDIR}/lib/libfesv
 
 # Build compilation script and compile all sources for Verilator simulation
 # Link verilated archive with $(VLT_COBJ)
-bin/.snitch_cluster.vlt.elf: $(VLT_AR) $(VLT_COBJ) ${VLT_BUILDDIR}/lib/libfesvr.a
+$(BIN_DIR)/$(TARGET).vlt: $(VLT_AR) $(VLT_COBJ) ${VLT_BUILDDIR}/lib/libfesvr.a
 	mkdir -p $(dir $@)
 	$(CXX) $(LDFLAGS) -std=c++14 -L ${VLT_BUILDDIR}/lib -o $@ $(VLT_COBJ) $(VLT_AR) -lfesvr -lpthread
 
-# Build wrapper around Verilator binary, needed to create .rtlbinary 
-bin/snitch_cluster.vlt: bin/.snitch_cluster.vlt.elf
-	@echo "#!/bin/bash" > $@
-	@echo 'binary=$$(realpath $$1)' >> $@
-	@echo 'echo $$binary > .rtlbinary' >> $@
-	@echo '$(abspath $<) $$binary $$2' >> $@
-	@chmod +x $@
-
 ############
 # Modelsim #
 ############
 
-.PHONY: clean-vsim
-
-# Clean all build directories and temporary files for Questasim simulation
-clean-vsim: clean-work
-	rm -rf bin/snitch_cluster.vsim bin/snitch_cluster.vsim.gui $(VSIM_BUILDDIR) vsim.wlf
-
-${VSIM_BUILDDIR}/compile.vsim.tcl:
-	$(VLIB) $(dir $@)
-	${BENDER} script vsim ${VSIM_BENDER} --vlog-arg="${VLOG_FLAGS} -work $(dir $@) " > $@
-	echo '${VLOG} -work $(dir $@) ${TB_CC_SOURCES} ${TB_ASM_SOURCES} -vv -ccflags "$(TB_CC_FLAGS)"' >> $@
-	echo 'return 0' >> $@
-
-# Build compilation script and compile all sources for Questasim simulation
-bin/snitch_cluster.vsim: ${VSIM_BUILDDIR}/compile.vsim.tcl $(VSIM_SOURCES) ${TB_SRCS} ${TB_CC_SOURCES} ${TB_ASM_SOURCES} work/lib/libfesvr.a
-	$(call QUESTASIM,tb_bin)
+include $(ROOT)/target/common/vsim.mk
 
 #######
 # VCS #
@@ -264,13 +245,13 @@ bin/snitch_cluster.vsim: ${VSIM_BUILDDIR}/compile.vsim.tcl $(VSIM_SOURCES) ${TB_
 
 # Clean all build directories and temporary files for VCS simulation
 clean-vcs: clean-work
-	rm -rf bin/snitch_cluster.vcs $(VCS_BUILDDIR) vc_hdrs.h
+	rm -rf $(BIN_DIR)/$(TARGET).vcs $(VCS_BUILDDIR) vc_hdrs.h
 
 # Build compilation script and compile all sources for VCS simulation
-bin/snitch_cluster.vcs: ${VCS_SOURCES} ${TB_SRCS} $(TB_CC_SOURCES) $(TB_ASM_SOURCES) $(VCS_BUILDDIR)/compile.sh work/lib/libfesvr.a
-	mkdir -p bin
-	$(VCS) -Mlib=$(VCS_BUILDDIR) -Mdir=$(VCS_BUILDDIR) -o bin/snitch_cluster.vcs -cc $(CC) -cpp $(CXX) \
-		-assert disable_cover -override_timescale=1ns/1ps -full64 tb_bin $(TB_CC_SOURCES) $(TB_ASM_SOURCES) \
+$(BIN_DIR)/$(TARGET).vcs: ${VCS_SOURCES} ${TB_SRCS} $(TB_CC_SOURCES) $(VCS_BUILDDIR)/compile.sh work/lib/libfesvr.a
+	mkdir -p $(BIN_DIR)
+	$(VCS) -Mlib=$(VCS_BUILDDIR) -Mdir=$(VCS_BUILDDIR) -o $(BIN_DIR)/$(TARGET).vcs -cc $(CC) -cpp $(CXX) \
+		-assert disable_cover -override_timescale=1ns/1ps -full64 tb_bin $(TB_CC_SOURCES) \
 		-CFLAGS "$(TB_CC_FLAGS)" -LDFLAGS "-L${FESVR}/lib" -lfesvr
 
 ########
@@ -300,9 +281,9 @@ help:
 	@echo -e ""
 	@echo -e "${Blue}help           ${Black}Show an overview of all Makefile targets."
 	@echo -e ""
-	@echo -e "${Blue}bin/snitch_cluster.vcs  ${Black}Build compilation script and compile all sources for VCS simulation."
-	@echo -e "${Blue}bin/snitch_cluster.vlt  ${Black}Build compilation script and compile all sources for Verilator simulation."
-	@echo -e "${Blue}bin/snitch_cluster.vsim ${Black}Build compilation script and compile all sources for Questasim simulation."
+	@echo -e "${Blue}$(BIN_DIR)/$(TARGET).vcs  ${Black}Build compilation script and compile all sources for VCS simulation."
+	@echo -e "${Blue}$(BIN_DIR)/$(TARGET).vlt  ${Black}Build compilation script and compile all sources for Verilator simulation."
+	@echo -e "${Blue}$(BIN_DIR)/$(TARGET).vsim ${Black}Build compilation script and compile all sources for Questasim simulation."
 	@echo -e ""
 	@echo -e "${Blue}sw               ${Black}Build all software."
 	@echo -e ""