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make: Include SV files from include directories
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fischeti committed Aug 8, 2024
1 parent f7e8a6e commit 7bdd4a2
Showing 1 changed file with 8 additions and 3 deletions.
11 changes: 8 additions & 3 deletions target/common/common.mk
Original file line number Diff line number Diff line change
Expand Up @@ -47,10 +47,15 @@ VLT_ROOT ?= ${VERILATOR_ROOT}
VLT_JOBS ?= $(shell nproc)
VLT_NUM_THREADS ?= 1

MATCH_END := '/+incdir+/ s/$$/\/*\/*/'
MATCH_BGN := 's/+incdir+//g'
MATCH_DEF := '/+define+/d'
SED_SRCS := sed -e ${MATCH_END} -e ${MATCH_BGN} -e ${MATCH_DEF}

COMMON_BENDER_FLAGS += -t rtl

VSIM_BENDER += $(COMMON_BENDER_FLAGS) -t test -t simulation -t vsim
VSIM_SOURCES = $(shell ${BENDER} script flist ${VSIM_BENDER})
VSIM_SOURCES = $(shell ${BENDER} script flist-plus ${VSIM_BENDER} | ${SED_SRCS})
VSIM_BUILDDIR ?= work-vsim
VSIM_FLAGS += -t 1ps
ifeq ($(DEBUG), ON)
Expand All @@ -63,15 +68,15 @@ endif
# VCS_BUILDDIR should to be the same as the `DEFAULT : ./work-vcs`
# in target/snitch_cluster/synopsys_sim.setup
VCS_BENDER += $(COMMON_BENDER_FLAGS) -t test -t simulation -t vcs
VCS_SOURCES = $(shell ${BENDER} script flist ${VCS_BENDER})
VCS_SOURCES = $(shell ${BENDER} script flist-plus ${VCS_BENDER} | ${SED_SRCS})
VCS_BUILDDIR := work-vcs

# fesvr is being installed here
FESVR ?= ${MKFILE_DIR}work
FESVR_VERSION ?= 35d50bc40e59ea1d5566fbd3d9226023821b1bb6

VLT_BENDER += $(COMMON_BENDER_FLAGS) -DCOMMON_CELLS_ASSERTS_OFF
VLT_SOURCES = $(shell ${BENDER} script flist ${VLT_BENDER})
VLT_SOURCES = $(shell ${BENDER} script flist-plus ${VLT_BENDER} | ${SED_SRCS})
VLT_BUILDDIR := $(abspath work-vlt)
VLT_FESVR = $(VLT_BUILDDIR)/riscv-isa-sim
VLT_FLAGS += --timing
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