hw: Also fix and enable util/run_vsim.sh

pulp-platform · Jun 19, 2024 · 597c495 · 597c495
1 parent 59b6986
commit 597c495
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Showing 2 changed files with 3 additions and 3 deletions.
diff --git a/hw/reqrsp_interface/test/axi_to_reqrsp_tb.sv b/hw/reqrsp_interface/test/axi_to_reqrsp_tb.sv
@@ -136,7 +136,7 @@ module axi_to_reqrsp_tb import reqrsp_pkg::*; #(
       reqrsp_monitor.rsp_mbx.get(rsp);
 
       // Check that we have seen the appropriate transactions on the inputs.
-      if (req.write) begin
+      if (req.write | is_amo(req.amo) | (req.amo == AMOSC)) begin
         axi_monitor.aw_mbx.peek(ax);
         axi_monitor.w_mbx.get(w);
         // Invert bits as this is signalled as a clear condition on AXI.
@@ -149,7 +149,7 @@ module axi_to_reqrsp_tb import reqrsp_pkg::*; #(
           else $error("[Write Strb] Expected `%h` got `%h`", w.w_strb, req.strb);
         assert(req.data == w.w_data)
           else $error("[Write Data] Expected `%h` got `%h`", w.w_data, req.data);
-        assert(req.write == 1);
+        assert(req.write == (req.amo == AMONone));
         assert (
           req.addr ==
             axi_pkg::beat_addr(ax.ax_addr, ax.ax_size, ax.ax_len, ax.ax_burst, id_cnt_write)

diff --git a/hw/reqrsp_interface/util/run_vsim.sh b/hw/reqrsp_interface/util/run_vsim.sh
@@ -16,7 +16,7 @@ call_vsim() {
     grep "Errors: 0," vsim.log
 }
 
-#call_vsim axi_to_reqrsp_tb
+call_vsim axi_to_reqrsp_tb
 call_vsim reqrsp_to_axi_tb
 call_vsim reqrsp_mux_tb
 call_vsim reqrsp_demux_tb