Bump FPU to pulp-v0.1.3

pulp-platform · Nov 22, 2023 · 3635d52 · 3635d52
1 parent 5a4584a
commit 3635d52
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Showing 4 changed files with 12 additions and 4 deletions.
diff --git a/Bender.yml b/Bender.yml
@@ -22,7 +22,7 @@ dependencies:
   axi:                { git: https://github.com/pulp-platform/axi,                version:  0.39.0  }
   axi_riscv_atomics:  { git: https://github.com/pulp-platform/axi_riscv_atomics,  version:  0.6.0   }
   common_cells:       { git: https://github.com/pulp-platform/common_cells,       version:  1.28.0  }
-  FPnew:              { git: https://github.com/openhwgroup/cvfpu,                rev:      1202ca3 }  # TODO: feature branch `feature/expanding_sdotp`; get merged!
+  FPnew:              { git: "https://github.com/pulp-platform/cvfpu.git",        rev:      pulp-v0.1.3 }
   register_interface: { git: https://github.com/pulp-platform/register_interface, version:  0.4.2   }
   tech_cells_generic: { git: https://github.com/pulp-platform/tech_cells_generic, version:  0.2.11  }
   riscv-dbg:          { git: https://github.com/pulp-platform/riscv-dbg,          version:  0.8.0   }

diff --git a/hw/snitch_cluster/src/snitch_cc.sv b/hw/snitch_cluster/src/snitch_cc.sv
@@ -487,6 +487,7 @@ module snitch_cc #(
       .trace_port_o            ( fpu_trace           ),
       .sequencer_tracer_port_o ( fpu_sequencer_trace ),
       // pragma translate_on
+      .hart_id_i        ( hart_id_i      ),
       .acc_req_i        ( acc_snitch_req ),
       .acc_req_valid_i  ( acc_qvalid     ),
       .acc_req_ready_o  ( acc_qready     ),

diff --git a/hw/snitch_cluster/src/snitch_fp_ss.sv b/hw/snitch_cluster/src/snitch_fp_ss.sv
@@ -42,6 +42,7 @@ module snitch_fp_ss import snitch_pkg::*; #(
   output fpu_trace_port_t  trace_port_o,
   output fpu_sequencer_trace_port_t sequencer_tracer_port_o,
   // pragma translate_on
+  input  logic [31:0]      hart_id_i,
   // Accelerator Interface - Slave
   input  acc_req_t         acc_req_i,
   input  logic             acc_req_valid_i,
@@ -2509,6 +2510,7 @@ module snitch_fp_ss import snitch_pkg::*; #(
   ) i_fpu (
     .clk_i                           ,
     .rst_ni         ( ~rst_i        ),
+    .hart_id_i      ( hart_id_i     ),
     .operands_i     ( op            ),
     .rnd_mode_i     ( fpu_rnd_mode  ),
     .op_i           ( fpu_op        ),

diff --git a/hw/snitch_cluster/src/snitch_fpu.sv b/hw/snitch_cluster/src/snitch_fpu.sv
@@ -19,6 +19,7 @@ module snitch_fpu import snitch_pkg::*; #(
   input logic                               clk_i,
   input logic                               rst_ni,
   // Input signals
+  input logic [31:0]                        hart_id_i,
   input logic [2:0][FLEN-1:0]               operands_i,
   input fpnew_pkg::roundmode_e              rnd_mode_i,
   input fpnew_pkg::operation_e              op_i,
@@ -99,12 +100,15 @@ module snitch_fpu import snitch_pkg::*; #(
 
   fpnew_top #(
     // FPU configuration
-    .Features       ( FPUFeatures ),
-    .Implementation ( FPUImplementation ),
-    .TagType        ( logic[6:0]        )
+    .Features                    ( FPUFeatures            ),
+    .Implementation              ( FPUImplementation      ),
+    .TagType                     ( logic[6:0]             ),
+    .CompressedVecCmpResult      ( 1                      ),
+    .StochasticRndImplementation ( fpnew_pkg::DEFAULT_RSR )
   ) i_fpu (
     .clk_i                                    ,
     .rst_ni                                   ,
+    .hart_id_i       ( hart_id_i             ),
     .operands_i      ( fpu_in_q.operands     ),
     .rnd_mode_i      ( fpu_in_q.rnd_mode     ),
     .op_i            ( fpu_in_q.op           ),
@@ -114,6 +118,7 @@ module snitch_fpu import snitch_pkg::*; #(
     .int_fmt_i       ( fpu_in_q.int_fmt      ),
     .vectorial_op_i  ( fpu_in_q.vectorial_op ),
     .tag_i           ( fpu_in_q.tag          ),
+    .simd_mask_i     ( '1                    ),
     .in_valid_i      ( in_valid_q            ),
     .in_ready_o      ( in_ready_q            ),
     .flush_i         ( 1'b0                  ),