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deps: Track Bender.lock file (#172)
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fischeti authored Aug 1, 2024
1 parent c12ce9b commit 231b863
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3 changes: 1 addition & 2 deletions .gitignore
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Expand Up @@ -3,7 +3,6 @@

# Dependency files
/.bender/
/Bender.lock

# Modelsim Files
*.wlf
Expand All @@ -22,4 +21,4 @@ gmon.out

# Installation directories
/.venv/
/tools/
/tools/
7 changes: 0 additions & 7 deletions Bender.local

This file was deleted.

123 changes: 123 additions & 0 deletions Bender.lock
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packages:
apb:
revision: 77ddf073f194d44b9119949d2421be59789e69ae
version: 0.2.4
source:
Git: https://github.com/pulp-platform/apb.git
dependencies:
- common_cells
axi:
revision: 41859549968db0147062b6c3cdbe4af00080cc09
version: null
source:
Git: https://github.com/pulp-platform/axi
dependencies:
- common_cells
- common_verification
- tech_cells_generic
axi_riscv_atomics:
revision: 430838a10a9bdf1e381d4fcb33907428f3273420
version: 0.6.0
source:
Git: https://github.com/pulp-platform/axi_riscv_atomics
dependencies:
- axi
- common_cells
- common_verification
axi_stream:
revision: 54891ff40455ca94a37641b9da4604647878cc07
version: 0.1.1
source:
Git: https://github.com/pulp-platform/axi_stream.git
dependencies:
- common_cells
cluster_icache:
revision: 0e1fb6751d9684d968ba7fb40836e6118b448ecd
version: 0.1.1
source:
Git: https://github.com/pulp-platform/cluster_icache.git
dependencies:
- axi
- common_cells
- scm
- tech_cells_generic
common_cells:
revision: c27bce39ebb2e6bae52f60960814a2afca7bd4cb
version: 1.37.0
source:
Git: https://github.com/pulp-platform/common_cells
dependencies:
- common_verification
- tech_cells_generic
common_verification:
revision: 9c07fa860593b2caabd9b5681740c25fac04b878
version: 0.2.3
source:
Git: https://github.com/pulp-platform/common_verification.git
dependencies: []
fpnew:
revision: a8e0cba6dd50f357ece73c2c955d96efc3c6c315
version: null
source:
Git: https://github.com/pulp-platform/cvfpu.git
dependencies:
- common_cells
- fpu_div_sqrt_mvp
fpu_div_sqrt_mvp:
revision: 86e1f558b3c95e91577c41b2fc452c86b04e85ac
version: 1.0.4
source:
Git: https://github.com/pulp-platform/fpu_div_sqrt_mvp.git
dependencies:
- common_cells
idma:
revision: c12caf59bb482fe44b27361f6924ad346b2d22fe
version: 0.6.3
source:
Git: https://github.com/pulp-platform/iDMA
dependencies:
- axi
- axi_stream
- common_cells
- common_verification
- obi
- register_interface
obi:
revision: c2141a653c755461ff44f61d12aeb5d99fc8e760
version: 0.1.3
source:
Git: https://github.com/pulp-platform/obi.git
dependencies:
- common_cells
- common_verification
register_interface:
revision: ae616e5a1ec2b41e72d200e5ab09c65e94aebd3d
version: 0.4.4
source:
Git: https://github.com/pulp-platform/register_interface
dependencies:
- apb
- axi
- common_cells
- common_verification
riscv-dbg:
revision: 358f90110220adf7a083f8b65d157e836d706236
version: 0.8.1
source:
Git: https://github.com/pulp-platform/riscv-dbg
dependencies:
- common_cells
- tech_cells_generic
scm:
revision: 998466d2a3c2d7d572e43d2666d93c4f767d8d60
version: 1.1.1
source:
Git: https://github.com/pulp-platform/scm.git
dependencies: []
tech_cells_generic:
revision: 7968dd6e6180df2c644636bc6d2908a49f2190cf
version: 0.2.13
source:
Git: https://github.com/pulp-platform/tech_cells_generic
dependencies:
- common_verification
2 changes: 1 addition & 1 deletion Bender.yml
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Expand Up @@ -19,7 +19,7 @@ package:
- Matheus Cavalcante <[email protected]>

dependencies:
axi: { git: https://github.com/pulp-platform/axi, version: 0.39.2 }
axi: { git: https://github.com/pulp-platform/axi, rev: vcs-fixes }
axi_riscv_atomics: { git: https://github.com/pulp-platform/axi_riscv_atomics, version: 0.6.0 }
common_cells: { git: https://github.com/pulp-platform/common_cells, version: 1.35.0 }
FPnew: { git: "https://github.com/pulp-platform/cvfpu.git", rev: pulp-v0.1.3 }
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2 changes: 1 addition & 1 deletion hw/snitch_cluster/src/snitch_cc.sv
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Expand Up @@ -854,7 +854,7 @@ module snitch_cc #(
// pragma translate_off
int f;
string fn;
logic [63:0] cycle = 0;
logic [63:0] cycle;
initial begin
// We need to schedule the assignment into a safe region, otherwise
// `hart_id_i` won't have a value assigned at the beginning of the first
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1 change: 1 addition & 0 deletions target/common/common.mk
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Expand Up @@ -124,6 +124,7 @@ VLOGAN_FLAGS := -assert svaext
VLOGAN_FLAGS += -assert disable_cover
VLOGAN_FLAGS += -full64
VLOGAN_FLAGS += -kdb
VLOGAN_FLAGS += -timescale=1ns/1ps
VHDLAN_FLAGS := -full64
VHDLAN_FLAGS += -kdb

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