Data Generation #1914

Job	Run time
riscv-isa-sim	7s
tc-gcc	2m 53s
tc-llvm	1m 8s
check-control-registers	24s
check-opcodes	9s
verilator	6s
verilator-model (minpool)	12s
verilator-model (mempool)	8s
tc-halide	7s
build-apps-halide (minpool)	58s
build-apps-gcc (minpool)	38s
build-apps-halide (mempool)	1m 4s
build-apps-gcc (mempool)	36s
check-bootrom	12s
build-apps-llvm (minpool)	1m 1s
unit-test	2m 14s
build-apps-llvm (mempool)	1m 12s
run-apps-gcc	0s
run-apps-halide (minpool)	39s
run-apps-halide (mempool)	3m 4s
run-apps-llvm	0s
clean-up	3s
clean-up-compile-runs (minpool)	9s
clean-up-compile-runs (mempool)	10s
	17m 14s

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