[target] Add CONVOLVE cluster target

targets/CMakeLists.txt

@@ -8,6 +8,7 @@
 set(AVAILABLE_TARGETS
   "chimera-host"
   "chimera-open"
+  "chimera-convolve"
   CACHE STRING "Available Targets"
 )
 
@@ -24,3 +25,7 @@ endif()
 if (TARGET_PLATFORM STREQUAL "chimera-open")
   add_subdirectory(chimera-open)
 endif()
+
+if (TARGET_PLATFORM STREQUAL "chimera-convolve")
+  add_subdirectory(chimera-convolve)
+endif()

targets/chimera-convolve/CMakeLists.txt

@@ -0,0 +1,37 @@
+# Copyright 2024 ETH Zurich and University of Bologna.
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Moritz Scherer <[email protected]>
+# Viviane Potocnik <[email protected]>
+
+file(GLOB_RECURSE ASM_SOURCES
+  "src/crt0.S"
+)
+
+file(GLOB_RECURSE C_SOURCES
+  "src/*.c"
+)
+
+set_property(SOURCE ${ASM_SOURCES} PROPERTY LANGUAGE ASM)
+
+target_sources(runtime
+  PRIVATE
+  ${ASM_SOURCES}
+  ${C_SOURCES}
+)
+
+# WIESEP: Export the target specific linkerscript
+target_link_options(runtime
+  PUBLIC
+  -L${CMAKE_CURRENT_LIST_DIR}
+  -Tlink.ld
+)
+
+# WIESEP: Export the target specific include directory
+target_include_directories(runtime
+  PUBLIC
+  ${CMAKE_CURRENT_LIST_DIR}/include
+)
+
+

targets/chimera-convolve/common.ldh

@@ -0,0 +1,57 @@
+/* Copyright 2022 ETH Zurich and University of Bologna. */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/* Nicole Narr <[email protected]> */
+/* Christopher Reinwardt <[email protected]> */
+/* Paul Scheffler <[email protected]> */
+
+/* This header defines symbols and rules universal to bare-metal execution */
+
+ENTRY(_start)
+
+MEMORY {
+  bootrom (rx)  : ORIGIN = 0x02000000, LENGTH = 16K
+  /* We assume at least 64 KiB SPM, same minus stack for ROMs. */
+  /* If more SPM is available, CRT0 repoints the stack. */
+  extrom (rx)   : ORIGIN = 0x00000000, LENGTH = 48K
+  spm (rwx)     : ORIGIN = 0x10000000, LENGTH = 64K
+  memisl (rwx)  : ORIGIN = 0x48000000, LENGTH = 64K
+  /* SPM of Cluster 4 (ETH Cluster) */
+  l1_c4(rwx) : ORIGIN = 0x40800000, LENGTH = 128K
+  /* We  assume at least 8 MiB of DRAM (minimum for Linux). */
+  dram (rwx)    : ORIGIN = 0x80000000, LENGTH = 8M
+}
+
+SECTIONS {
+  /* Keep binaries lean */
+  /DISCARD/ : { *(.riscv.attributes) *(.comment) }
+
+  /* Global and stack pointer */
+  /* By default, keep the calling context (boot ROM) stack pointer */
+  __global_pointer$ = ADDR(.misc) + SIZEOF(.misc) / 2;
+  __stack_pointer$  = __stack_start - 8;
+
+  /* Further addresses */
+  __base_dma      = 0x01000000;
+  __base_bootrom  = 0x02000000;
+  __base_clint    = 0x02040000;
+  __base_axirt    = 0x020C0000;
+  __base_axirtgrd = 0x020C1ffc;
+  __base_regs     = 0x03000000;
+  __base_llc      = 0x03001000;
+  __base_uart     = 0x03002000;
+  __base_i2c      = 0x03003000;
+  __base_spih     = 0x03004000;
+  __base_gpio     = 0x03005000;
+  __base_slink    = 0x03006000;
+  __base_vga      = 0x03007000;
+  __base_usb      = 0x03008000;
+  __base_bus_err  = 0x03009000;
+  __base_plic     = 0x04000000;
+  __base_clic     = 0x08000000;
+  __base_spm      = ORIGIN(spm);
+  __base_dram     = ORIGIN(dram);
+  __base_memisl   = ORIGIN(memisl);
+  __stack_start   = ORIGIN(memisl) + LENGTH(memisl);
+}

targets/chimera-convolve/include/addr_maps/cluster_4_addr_map.h

@@ -0,0 +1,41 @@
+// Copyright 2024 ETH Zurich and University of Bologna.
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+//
+// Philip Wiese <[email protected]>
+
+#ifndef _CLUSTER_4_ADDR_MAP_INCLUDE_GUARD_
+#define _CLUSTER_4_ADDR_MAP_INCLUDE_GUARD_
+
+#include "addr_maps/soc_addr_map.h"
+
+#include <stdint.h>
+
+#define CLUSTER_4_TCDM_BASE_ADDR (CLUSTER_4_BASE)
+#define CLUSTER_4_PERIPH_BASE_ADDR (CLUSTER_4_BASE + 0x20000)
+#define CLUSTER_4_ZERO_MEM_BASE_ADDR (CLUSTER_4_BASE + 0x30000)
+#define CLUSTER_4_HWPE_ITA_BASE_ADDR (CLUSTER_4_BASE + 0x40000)
+
+// Define start and end of the regions
+#define CLUSTER_4_TCDM_START_ADDR CLUSTER_4_TCDM_BASE_ADDR
+#define CLUSTER_4_TCDM_END_ADDR CLUSTER_4_PERIPH_BASE_ADDR
+#define CLUSTER_4_PERIPH_START_ADDR CLUSTER_4_PERIPH_BASE_ADDR
+#define CLUSTER_4_PERIPH_END_ADDR CLUSTER_4_ZERO_MEM_BASE_ADDR
+#define CLUSTER_4_ZERO_MEM_START_ADDR CLUSTER_4_ZERO_MEM_BASE_ADDR
+#define CLUSTER_4_ZERO_MEM_END_ADDR CLUSTER_4_HWPE_ITA_BASE_ADDR
+#define CLUSTER_4_HWPE_ITA_START_ADDR CLUSTER_4_HWPE_ITA_BASE_ADDR
+#define CLUSTER_4_HWPE_ITA_END_ADDR (CLUSTER_4_BASE + 0x10000)
+
+#define CLUSTER_4_HW_BARRIER_ADDR \
+    (CLUSTER_4_PERIPH_BASE_ADDR + CLUSTER_4_PERIPHERAL_HW_BARRIER_REG_OFFSET)
+
+#define CLUSTER_4_PERF_COUNTER_ADDR \
+    (CLUSTER_4_PERIPH_BASE_ADDR + CLUSTER_4_PERIPHERAL_PERF_COUNTER_ENABLE_0_REG_OFFSET)
+
+#define CLUSTER_4_HWPE_EVT_ADDR \
+    (CLUSTER_4_PERIPH_BASE_ADDR + CLUSTER_4_PERIPHERAL_HWPE_EVT_REG_OFFSET)
+
+#define CLUSTER_4_HWPE_BUSY_ADDR \
+    (CLUSTER_4_PERIPH_BASE_ADDR + CLUSTER_4_PERIPHERAL_HWPE_BUSY_REG_OFFSET)
+
+#endif //_CLUSTER_4_ADDR_MAP_INCLUDE_GUARD_

targets/chimera-convolve/include/addr_maps/soc_addr_map.h

@@ -0,0 +1,39 @@
+// Copyright 2024 ETH Zurich and University of Bologna.
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+//
+// Moritz Scherer <[email protected]>
+
+#ifndef _SOC_ADDR_MAP_INCLUDE_GUARD_
+#define _SOC_ADDR_MAP_INCLUDE_GUARD_
+
+#include <stdint.h>
+
+#define CLINT_CTRL_BASE 0x02040000
+
+#define SOC_CTRL_BASE 0x30001000
+
+#define CLUSTER_0_BASE 0x40000000
+#define CLUSTER_1_BASE 0x40200000
+#define CLUSTER_2_BASE 0x40400000
+#define CLUSTER_3_BASE 0x40600000
+#define CLUSTER_4_BASE 0x40800000
+
+#define CLUSTER_0_NUMCORES 2
+#define CLUSTER_1_NUMCORES 2
+#define CLUSTER_2_NUMCORES 2
+#define CLUSTER_3_NUMCORES 3
+#define CLUSTER_4_NUMCORES 9
+
+#define NUM_CLUSTER_CORES \
+    (CLUSTER_0_NUMCORES + CLUSTER_1_NUMCORES + CLUSTER_2_NUMCORES + CLUSTER_3_NUMCORES + \
+     CLUSTER_4_NUMCORES)
+
+static uint8_t _chimera_numCores[] = {CLUSTER_0_NUMCORES, CLUSTER_1_NUMCORES, CLUSTER_2_NUMCORES,
+                                      CLUSTER_3_NUMCORES, CLUSTER_4_NUMCORES};
+#define _chimera_numClusters 5
+
+#define CHIMERA_PADFRAME_BASE_ADDRESS 0x30002000
+#define FLL_BASE_ADDR 0x30003000
+
+#endif

targets/chimera-convolve/include/cluster_4.h

@@ -0,0 +1,13 @@
+// Copyright 2024 ETH Zurich and University of Bologna.
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+//
+// Philip Wiese <[email protected]>
+
+#ifndef _CLUSTER_4_INCLUDE_GUARD_
+#define _CLUSTER_4_INCLUDE_GUARD_
+
+#include "regs/cluster_4_reg.h"
+#include "addr_maps/cluster_4_addr_map.h"
+
+#endif // _CLUSTER_4_INCLUDE_GUARD_