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[hw] Re-introduce mmu stub #3066

[hw] Re-introduce mmu stub

[hw] Re-introduce mmu stub #3066

GitHub Actions / verible-verilog-lint failed Dec 3, 2024 in 0s

reviewdog [verible-verilog-lint] report

reported by reviewdog 🐶

Findings (18)

hw/mmu_req_gen.sv|15 col 101| Line length exceeds max: 100; is: 108 [Style: line-length] [line-length]
hw/mmu_req_gen.sv|20 col 101| Line length exceeds max: 100; is: 105 [Style: line-length] [line-length]
hw/mmu_stub.sv|11 col 16| Use spaces, not tabs. [Style: tabs] [no-tabs]
hw/mmu_stub.sv|11 col 101| Line length exceeds max: 100; is: 119 [Style: line-length] [line-length]
hw/mmu_stub.sv|12 col 16| Use spaces, not tabs. [Style: tabs] [no-tabs]
hw/mmu_stub.sv|12 col 101| Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]
hw/mmu_stub.sv|13 col 23| Use spaces, not tabs. [Style: tabs] [no-tabs]
hw/mmu_stub.sv|15 col 16| Use spaces, not tabs. [Style: tabs] [no-tabs]
hw/mmu_stub.sv|16 col 16| Use spaces, not tabs. [Style: tabs] [no-tabs]
hw/mmu_stub.sv|17 col 16| Use spaces, not tabs. [Style: tabs] [no-tabs]
hw/mmu_stub.sv|18 col 10| Use spaces, not tabs. [Style: tabs] [no-tabs]
hw/mmu_stub.sv|19 col 16| Use spaces, not tabs. [Style: tabs] [no-tabs]
hw/mmu_stub.sv|21 col 16| Use spaces, not tabs. [Style: tabs] [no-tabs]
hw/mmu_stub.sv|23 col 17| Use spaces, not tabs. [Style: tabs] [no-tabs]
hw/mmu_stub.sv|26 col 17| Use spaces, not tabs. [Style: tabs] [no-tabs]
hw/mmu_stub.sv|28 col 11| Use spaces, not tabs. [Style: tabs] [no-tabs]
hw/cheshire_soc.sv|829 col 101| Line length exceeds max: 100; is: 114 [Style: line-length] [line-length]
hw/cheshire_soc.sv|837 col 101| Line length exceeds max: 100; is: 102 [Style: line-length] [line-length]

Filtered Findings (0)

Annotations

Check warning on line 15 in hw/mmu_req_gen.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/mmu_req_gen.sv#L15

Line length exceeds max: 100; is: 108 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 108 [Style: line-length] [line-length]" location:{path:"hw/mmu_req_gen.sv" range:{start:{line:15 column:101}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}

Check warning on line 20 in hw/mmu_req_gen.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/mmu_req_gen.sv#L20

Line length exceeds max: 100; is: 105 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 105 [Style: line-length] [line-length]" location:{path:"hw/mmu_req_gen.sv" range:{start:{line:20 column:101}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}

Check warning on line 11 in hw/mmu_stub.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/mmu_stub.sv#L11

Use spaces, not tabs. [Style: tabs] [no-tabs]
Raw output
message:"Use spaces, not tabs. [Style: tabs] [no-tabs]" location:{path:"hw/mmu_stub.sv" range:{start:{line:11 column:16}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}

Check warning on line 11 in hw/mmu_stub.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/mmu_stub.sv#L11

Line length exceeds max: 100; is: 119 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 119 [Style: line-length] [line-length]" location:{path:"hw/mmu_stub.sv" range:{start:{line:11 column:101}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}

Check warning on line 12 in hw/mmu_stub.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/mmu_stub.sv#L12

Use spaces, not tabs. [Style: tabs] [no-tabs]
Raw output
message:"Use spaces, not tabs. [Style: tabs] [no-tabs]" location:{path:"hw/mmu_stub.sv" range:{start:{line:12 column:16}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}

Check warning on line 12 in hw/mmu_stub.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/mmu_stub.sv#L12

Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]" location:{path:"hw/mmu_stub.sv" range:{start:{line:12 column:101}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}

Check warning on line 13 in hw/mmu_stub.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/mmu_stub.sv#L13

Use spaces, not tabs. [Style: tabs] [no-tabs]
Raw output
message:"Use spaces, not tabs. [Style: tabs] [no-tabs]" location:{path:"hw/mmu_stub.sv" range:{start:{line:13 column:23}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}

Check warning on line 15 in hw/mmu_stub.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/mmu_stub.sv#L15

Use spaces, not tabs. [Style: tabs] [no-tabs]
Raw output
message:"Use spaces, not tabs. [Style: tabs] [no-tabs]" location:{path:"hw/mmu_stub.sv" range:{start:{line:15 column:16}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}

Check warning on line 16 in hw/mmu_stub.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/mmu_stub.sv#L16

Use spaces, not tabs. [Style: tabs] [no-tabs]
Raw output
message:"Use spaces, not tabs. [Style: tabs] [no-tabs]" location:{path:"hw/mmu_stub.sv" range:{start:{line:16 column:16}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}

Check warning on line 17 in hw/mmu_stub.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/mmu_stub.sv#L17

Use spaces, not tabs. [Style: tabs] [no-tabs]
Raw output
message:"Use spaces, not tabs. [Style: tabs] [no-tabs]" location:{path:"hw/mmu_stub.sv" range:{start:{line:17 column:16}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}

Check warning on line 18 in hw/mmu_stub.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/mmu_stub.sv#L18

Use spaces, not tabs. [Style: tabs] [no-tabs]
Raw output
message:"Use spaces, not tabs. [Style: tabs] [no-tabs]" location:{path:"hw/mmu_stub.sv" range:{start:{line:18 column:10}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}

Check warning on line 19 in hw/mmu_stub.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/mmu_stub.sv#L19

Use spaces, not tabs. [Style: tabs] [no-tabs]
Raw output
message:"Use spaces, not tabs. [Style: tabs] [no-tabs]" location:{path:"hw/mmu_stub.sv" range:{start:{line:19 column:16}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}

Check warning on line 21 in hw/mmu_stub.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/mmu_stub.sv#L21

Use spaces, not tabs. [Style: tabs] [no-tabs]
Raw output
message:"Use spaces, not tabs. [Style: tabs] [no-tabs]" location:{path:"hw/mmu_stub.sv" range:{start:{line:21 column:16}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}

Check warning on line 23 in hw/mmu_stub.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/mmu_stub.sv#L23

Use spaces, not tabs. [Style: tabs] [no-tabs]
Raw output
message:"Use spaces, not tabs. [Style: tabs] [no-tabs]" location:{path:"hw/mmu_stub.sv" range:{start:{line:23 column:17}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}

Check warning on line 26 in hw/mmu_stub.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/mmu_stub.sv#L26

Use spaces, not tabs. [Style: tabs] [no-tabs]
Raw output
message:"Use spaces, not tabs. [Style: tabs] [no-tabs]" location:{path:"hw/mmu_stub.sv" range:{start:{line:26 column:17}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}

Check warning on line 28 in hw/mmu_stub.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/mmu_stub.sv#L28

Use spaces, not tabs. [Style: tabs] [no-tabs]
Raw output
message:"Use spaces, not tabs. [Style: tabs] [no-tabs]" location:{path:"hw/mmu_stub.sv" range:{start:{line:28 column:11}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}

Check warning on line 829 in hw/cheshire_soc.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/cheshire_soc.sv#L829

Line length exceeds max: 100; is: 114 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 114 [Style: line-length] [line-length]" location:{path:"hw/cheshire_soc.sv" range:{start:{line:829 column:101}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}

Check warning on line 837 in hw/cheshire_soc.sv

See this annotation in the file changed.

@github-actions github-actions / verible-verilog-lint

[verible-verilog-lint] hw/cheshire_soc.sv#L837

Line length exceeds max: 100; is: 102 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 102 [Style: line-length] [line-length]" location:{path:"hw/cheshire_soc.sv" range:{start:{line:837 column:101}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}