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make: Use Bender flags variable for VCS compile script
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paulsc96 committed Dec 16, 2024
1 parent 01c529c commit c76eb98
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion cheshire.mk
Original file line number Diff line number Diff line change
Expand Up @@ -152,7 +152,7 @@ $(CHS_ROOT)/target/sim/vsim/compile.cheshire_soc.tcl: $(CHS_ROOT)/Bender.yml
echo 'vlog "$(realpath $(CHS_ROOT))/target/sim/src/elfloader.cpp" -ccflags "-std=c++11" -cpppath "$(CXX_PATH)"' >> $@

$(CHS_ROOT)/target/sim/vcs/compile.cheshire_soc.sh: $(CHS_ROOT)/Bender.yml
$(BENDER) script vcs -t sim -t cv64a6_imafdcsclic_sv39 -t test -t cva6 -t rtl --vlog-arg="$(VLOGAN_ARGS)" --vlogan-bin="$(VLOGAN)" > $@
$(BENDER) script vcs -t sim -t test $(CHS_BENDER_RTL_FLAGS) --vlog-arg="$(VLOGAN_ARGS)" --vlogan-bin="$(VLOGAN)" > $@
chmod +x $@

.PRECIOUS: $(CHS_ROOT)/target/sim/models
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