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target/xilinx: Fix FPGA wrapper
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bluewww committed Nov 14, 2023
1 parent 3591aa5 commit 99b6541
Showing 1 changed file with 2 additions and 2 deletions.
4 changes: 2 additions & 2 deletions target/xilinx/src/cheshire_top_xilinx.sv
Original file line number Diff line number Diff line change
Expand Up @@ -123,12 +123,12 @@ module cheshire_top_xilinx
LlcOutConnect : 1,
LlcOutRegionStart : 'h8000_0000,
LlcOutRegionEnd : 'h1_0000_0000,
LlcUserMsb : 0,
LlcUserLsb : 0,
// LLC partitioning
LlcCachePartition : 0,
LlcMaxPartition : 0,
LlcRemapHash : axi_llc_pkg::Modulo,
LlcUserAmoMsb : 0,
LlcUserAmoLsb : 0,
// VGA: RGB332
VgaRedWidth : 5,
VgaGreenWidth : 6,
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