target/xilinx: Disable retiming

pulp-platform · Mar 5, 2024 · 5835bbf · 5835bbf
1 parent 95c6916
commit 5835bbf
Showing 1 changed file with 2 additions and 1 deletion.
diff --git a/target/xilinx/scripts/impl_sys.tcl b/target/xilinx/scripts/impl_sys.tcl
@@ -29,7 +29,8 @@ update_compile_order -fileset sources_1
 # Set synthesis properties
 set_property XPM_LIBRARIES XPM_MEMORY               [current_project]
 set_property strategy Flow_PerfOptimized_high       [get_runs synth_1]
-set_property STEPS.SYNTH_DESIGN.ARGS.RETIMING true  [get_runs synth_1]
+# TODO: this makes Vivado run out of resources on VCU128... Can we do this locally?
+#set_property STEPS.SYNTH_DESIGN.ARGS.RETIMING true  [get_runs synth_1]
 
 # Elaborate and open design to explore all clocks
 synth_design -rtl -name rtl_1