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Dual core SMP execution in Carfield.
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Yvan Tortorella committed Dec 5, 2023
1 parent eea4ad2 commit 56c21a6
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Showing 2 changed files with 20 additions and 5 deletions.
7 changes: 7 additions & 0 deletions sw/include/util.h
Original file line number Diff line number Diff line change
Expand Up @@ -80,3 +80,10 @@ static inline void *gprw(void *gp) {
if (!(cond)) return (ret);

#define MIN(a, b) (((a) <= (b)) ? (a) : (b))

// Read hart ID
static inline unsigned int hart_id() {
int hart_id;
asm volatile("csrr %0, mhartid" : "=r" (hart_id) : );
return hart_id;
}
18 changes: 13 additions & 5 deletions sw/lib/crt0.S
Original file line number Diff line number Diff line change
Expand Up @@ -15,8 +15,10 @@ _start:
csrrc x0, mstatus, 10

// Park SMP harts
csrr t0, mhartid
beqz t0, 2f
// csrr t0, mhartid
// beqz t0, 2f
// All harts continue.
beq t0, t0, 2f
1:
wfi
j 1b
Expand Down Expand Up @@ -110,13 +112,19 @@ _fp_init:

// Set FS state to "Clean"
csrrc x0, mstatus, t1
// Non SMP Hart initializes the SoC
// SMP Harts jump to main
csrr t0, mhartid
beqz t0, _soc_init
j _program_start
// Full fence, then init SoC
fence
_soc_init:
// Init SoC, than jump to main
jal x1, soc_init
_program_start:
// Full fence, then go to main
fence
call main
// If main returns, we end up here
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