Add fifo to decouple DMA effects

pulp-platform · Sep 19, 2023 · 3267c77 · 3267c77
1 parent 43fe908
commit 3267c77
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Showing 2 changed files with 40 additions and 23 deletions.
diff --git a/hw/cheshire_soc.sv b/hw/cheshire_soc.sv
@@ -1411,13 +1411,36 @@ module cheshire_soc import cheshire_pkg::*; #(
 
     axi_mst_req_t axi_dma_req;
 
+    axi_mst_req_t axi_fifo_dma_req;
+    axi_mst_rsp_t axi_fifo_dma_rsp;
+
     always_comb begin
       axi_in_req[AxiIn.dma]         = axi_dma_req;
       axi_in_req[AxiIn.dma].aw.user = Cfg.AxiUserDefault;
       axi_in_req[AxiIn.dma].w.user  = Cfg.AxiUserDefault;
       axi_in_req[AxiIn.dma].ar.user = Cfg.AxiUserDefault;
     end
 
+    axi_fifo #(
+      .Depth(1024),
+      .FallThrough (1'b0),
+      .aw_chan_t (axi_mst_aw_chan_t),
+      .w_chan_t  (axi_mst_w_chan_t),
+      .b_chan_t  (axi_mst_b_chan_t),
+      .ar_chan_t (axi_mst_ar_chan_t),
+      .r_chan_t  (axi_mst_r_chan_t),
+      .axi_req_t (axi_mst_req_t),
+      .axi_resp_t(axi_mst_rsp_t)
+    ) i_axi_fifo_dma (
+      .clk_i,
+      .rst_ni,
+      .test_i     ( 1'b0  ),
+      .slv_req_i  ( axi_fifo_dma_req ),
+      .slv_resp_o ( axi_fifo_dma_rsp ),
+      .mst_req_o  ( axi_dma_req           ),
+      .mst_resp_i ( axi_in_rsp[AxiIn.dma] )
+    );
+
     dma_core_wrap #(
       .AxiAddrWidth       ( Cfg.AddrWidth           ),
       .AxiDataWidth       ( Cfg.AxiDataWidth        ),
@@ -1437,8 +1460,8 @@ module cheshire_soc import cheshire_pkg::*; #(
       .clk_i,
       .rst_ni,
       .testmode_i     ( test_mode_i ),
-      .axi_mst_req_o  ( axi_dma_req           ),
-      .axi_mst_rsp_i  ( axi_in_rsp[AxiIn.dma] ),
+      .axi_mst_req_o  ( axi_fifo_dma_req ),
+      .axi_mst_rsp_i  ( axi_fifo_dma_rsp ),
       .axi_slv_req_i  ( dma_cut_req ),
       .axi_slv_rsp_o  ( dma_cut_rsp )
     );

diff --git a/sw/tests/2d_dma.c b/sw/tests/2d_dma.c
@@ -9,37 +9,31 @@
 int main(void){
 
     // Size of transfer
-    volatile uint64_t size_bytes = 8;
+    volatile uint64_t size_bytes = 256;
     // Source stride
     volatile uint64_t src_stride = 0;
     // Destination stride
     volatile uint64_t dst_stride = 0;
     // Number of repetitions
-    volatile uint64_t num_reps = 128;
+    volatile uint64_t num_reps = 4;
     volatile uint64_t *dst = 0x50000000;
     volatile uint64_t *src = 0x40000000;
 
+    // enable and configure axi rt
+    __axirt_claim(0, 0);
+    __axirt_set_len_limit_group(15, 0);
+    __axirt_set_len_limit_group(15, 1);
+    for (int m = 0; m < AXI_RT_PARAM_NUM_MRG; m++) {
+        __axirt_set_region(0, 0xffffffff, 0, m);
+        __axirt_set_region(0x100000000, 0xffffffffffffffff, 1, m);
+        __axirt_set_budget(0x10000000, 0, m);
+        __axirt_set_budget(0x10000000, 1, m);
+        __axirt_set_period(0x10000000, 0, m);
+        __axirt_set_period(0x10000000, 1, m);
+    }
+    __axirt_enable(0xffffffff);
 
     sys_dma_2d_blk_memcpy(dst, src, size_bytes, dst_stride, src_stride, num_reps);
-    fence();
-
-//    // enable and configure axi rt
-//    __axirt_claim(0, 0);
-//    __axirt_set_len_limit_group(0, 0);
-//    __axirt_set_len_limit_group(0, 1);
-//    for (int m = 0; m < AXI_RT_PARAM_NUM_MRG; m++) {
-//        __axirt_set_region(0, 0xffffffff, 0, m);
-//        __axirt_set_region(0x100000000, 0xffffffffffffffff, 1, m);
-//        __axirt_set_budget(0x10000000, 0, m);
-//        __axirt_set_budget(0x10000000, 1, m);
-//        __axirt_set_period(0x10000000, 0, m);
-//        __axirt_set_period(0x10000000, 1, m);
-//    }
-//    __axirt_enable(0xffffffff);
-//    fence();
-//
-//    sys_dma_2d_blk_memcpy(dst, src, size_bytes, dst_stride, src_stride, num_reps);
-//    fence();
 
     return 0;
 }