Allow cores synchronization at reset.

pulp-platform · Dec 7, 2023 · 160e22b · 160e22b
1 parent e5b0b03
commit 160e22b
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Showing 2 changed files with 17 additions and 2 deletions.
diff --git a/hw/cheshire_soc.sv b/hw/cheshire_soc.sv
@@ -615,6 +615,7 @@ module cheshire_soc import cheshire_pkg::*; #(
   end
 
   cva6_wrap #(
+    .Cfg              ( Cfg                  ),
     .Cva6Cfg          ( Cva6Cfg              ),
     .NumHarts         ( NumIntHarts          ),
     .AxiAddrWidth     ( Cfg.AddrWidth        ),
@@ -633,6 +634,7 @@ module cheshire_soc import cheshire_pkg::*; #(
     .rstn_i           ( rst_ni                          ),
     .bootaddress_i    ( BootAddr                        ),
     .hart_id_i        ( '0                              ),
+    .harts_sync_req_i ( reg_reg2hw.harts_sync.q         ),
     .irq_i            ( xeip[NumIntHarts-1:0]           ),
     .ipi_i            ( msip[NumIntHarts-1:0]           ),
     .time_irq_i       ( mtip[NumIntHarts-1:0]           ),
@@ -1042,6 +1044,7 @@ module cheshire_soc import cheshire_pkg::*; #(
   /////////////////////
 
   cheshire_reg_pkg::cheshire_hw2reg_t reg_hw2reg;
+  cheshire_reg_pkg::cheshire_reg2hw_t reg_reg2hw;
 
   assign reg_hw2reg = '{
     boot_mode     : boot_mode_i,
@@ -1080,6 +1083,7 @@ module cheshire_soc import cheshire_pkg::*; #(
     .reg_req_i  ( reg_out_req[RegOut.regs] ),
     .reg_rsp_o  ( reg_out_rsp[RegOut.regs] ),
     .hw2reg     ( reg_hw2reg ),
+    .reg2hw     ( reg_reg2hw ),
     .devmode_i  ( 1'b1 )
   );
 

diff --git a/hw/cva6_wrap.sv b/hw/cva6_wrap.sv
@@ -26,6 +26,7 @@ module cva6_wrap #(
   input  logic                                             rstn_i,
   input  cheshire_pkg::doub_bt                             bootaddress_i,
   input  cheshire_pkg::doub_bt                             hart_id_i,
+  input  logic             [31:0]                          harts_sync_req_i,
   input  logic             [NumHarts-1:0][1:0]             irq_i,
   input  logic             [NumHarts-1:0]                  ipi_i,
   input  logic             [NumHarts-1:0]                  time_irq_i,
@@ -70,6 +71,7 @@ typedef struct packed {
   axi_req_t axi_req;
 } cva6_outputs_t;
 
+logic                         cores_sync;
 logic          [NumHarts-1:0] core_setback;
 cva6_inputs_t  [NumHarts-1:0] sys2hmr, hmr2core;
 cva6_outputs_t [NumHarts-1:0] hmr2sys, core2hmr;
@@ -137,12 +139,15 @@ for (genvar i = 0; i < NumHarts; i++) begin: gen_cva6_cores
   );
 end
 
+assign cores_sync = (harts_sync_req_i[NumHarts-1:0] == '1) ? 1'b1 : 1'b0;
+
 if (NumHarts > 1) begin: gen_multicore_hmr
   hmr_unit #(
     .NumCores          ( NumHarts          ),
     .DMRSupported      ( Cfg.Cva6DMR       ),
     .DMRFixed          ( Cfg.Cva6DMRFixed  ), // TODO: make configurable
     .TMRSupported      ( 0                 ),
+    // .InterleaveGrps    ( 0                 ),
     .RapidRecovery     ( Cfg.RapidRecovery ),
     .SeparateData      ( 0                 ),
     .RfAddrWidth       ( 5                 ),
@@ -170,7 +175,12 @@ if (NumHarts > 1) begin: gen_multicore_hmr
     .dmr_error_o        ( /* TODO */ ), // Should this not be NumDMRCores? or NumCores?
     .dmr_resynch_req_o  ( /* TODO */ ),
     .dmr_sw_synch_req_o ( /* TODO */ ),
-    .dmr_cores_synch_i  ( '0         ),
+    // In PULP cluster we connected this to the event unit
+    // to receive information about cores' synchronization.
+    // How should we handle it here? We could use Cheshire's
+    // registers to write that a synchronization completed
+    // succesfully (??)
+    .dmr_cores_synch_i  ( cores_sync ),
 
     // Rapid recovery buses
     .rapid_recovery_o ( /* TODO */ ),
@@ -179,7 +189,8 @@ if (NumHarts > 1) begin: gen_multicore_hmr
     .sys_inputs_i          ( sys2hmr ),
     .sys_nominal_outputs_o ( hmr2sys ),
     .sys_bus_outputs_o     (         ),
-    .sys_fetch_en_i        ( '0      ), // TODO?
+    // CVA6 boot does not rely on fetch enable.
+    .sys_fetch_en_i        ( '1      ),
     .enable_bus_vote_i     ( '0      ), // TODO?
 
     .core_setback_o         ( core_setback ),