Wrap cores in idle HMR unit. #1504
yvantorAnnotations
1 error and 7 warnings
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check
Process completed with exit code 1.
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[verible-verilog-lint] hw/cva6_wrap.sv#L35:
hw/cva6_wrap.sv#L35
Line length exceeds max: 100; is: 102 [Style: line-length] [line-length]
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[verible-verilog-lint] hw/cva6_wrap.sv#L37:
hw/cva6_wrap.sv#L37
Line length exceeds max: 100; is: 119 [Style: line-length] [line-length]
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[verible-verilog-lint] hw/cva6_wrap.sv#L38:
hw/cva6_wrap.sv#L38
Line length exceeds max: 100; is: 110 [Style: line-length] [line-length]
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[verible-verilog-lint] hw/cva6_wrap.sv#L39:
hw/cva6_wrap.sv#L39
Line length exceeds max: 100; is: 113 [Style: line-length] [line-length]
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[verible-verilog-lint] hw/cva6_wrap.sv#L40:
hw/cva6_wrap.sv#L40
Line length exceeds max: 100; is: 116 [Style: line-length] [line-length]
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[verible-verilog-lint] hw/cva6_wrap.sv#L41:
hw/cva6_wrap.sv#L41
Line length exceeds max: 100; is: 112 [Style: line-length] [line-length]
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[verible-verilog-lint] hw/cva6_wrap.sv#L42:
hw/cva6_wrap.sv#L42
Line length exceeds max: 100; is: 116 [Style: line-length] [line-length]
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