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Add source- and destination-clock-domain "halves" for the clock domain crossing (CDC): axi_cdc_src and axi_cdc_dst. This is implemented by refactoring the axi_cdc module, so the
implementation is reused from the existing axi_cdc module. To avoid code duplication, axi_cdc
now instantiates an axi_cdc_src connected to an axi_cdc_dst.
Changed
axi_lite_to_apb: Make pipeline registers on request and response path optional (can be enabled
with the new PipelineRequest and PipelineResponseparameters), and disable those pipeline
registers by default.
Fixed
axi_demux: Improve compatibility with new version of QuestaSim's optimizer (vopt) (#169).
Before this workaround, QuestaSim 2020.2 and 2021.1 could segfault on instances of axi_demux.