Skip to content

Commit

Permalink
README: Remove .sv suffix from DWC module names
Browse files Browse the repository at this point in the history
  • Loading branch information
andreaskurth committed Mar 24, 2020
1 parent d712435 commit ef890ef
Showing 1 changed file with 3 additions and 3 deletions.
6 changes: 3 additions & 3 deletions README.md
Original file line number Diff line number Diff line change
Expand Up @@ -13,9 +13,9 @@ This is the implementation of the AMBA AXI protocol developed as part of the PUL
| [`axi_cut`](src/axi_cut.sv) | Breaks all combinatorial paths between its input and output. | |
| [`axi_delayer`](src/axi_delayer.sv) | Synthesizable module which can (randomly) delays AXI channels. | |
| [`axi_demux`](src/axi_demux.sv) | Demultiplexes an AXI bus from one slave port to multiple master ports. | [Doc](doc/axi_demux.md) |
| [`axi_dw_converter.sv`](src/axi_dw_converter.sv) | A data width converter between AXI interfaces of any data width. | |
| [`axi_dw_downsizer.sv`](src/axi_dw_downsizer.sv) | A data width converter between a wide AXI master and a narrower AXI slave. | |
| [`axi_dw_upsizer.sv`](src/axi_dw_upsizer.sv) | A data width converter between a narrow AXI master and a wider AXI slave. | |
| [`axi_dw_converter`](src/axi_dw_converter.sv) | A data width converter between AXI interfaces of any data width. | |
| [`axi_dw_downsizer`](src/axi_dw_downsizer.sv) | A data width converter between a wide AXI master and a narrower AXI slave. | |
| [`axi_dw_upsizer`](src/axi_dw_upsizer.sv) | A data width converter between a narrow AXI master and a wider AXI slave. | |
| [`axi_err_slv`](src/axi_err_slv.sv) | Always responds with an AXI decode/slave error for transactions which are sent to it. | |
| [`axi_id_prepend`](src/axi_id_prepend.sv) | This module prepends/strips the MSB from the AXI IDs. | |
| [`axi_intf`](src/axi_intf.sv) | This file defines the interfaces we support. | |
Expand Down

0 comments on commit ef890ef

Please sign in to comment.