synth: Refactor synth wrappers

pulp-platform · Sep 26, 2023 · 47b895f · 47b895f
1 parent ca6645d
commit 47b895f
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Showing 5 changed files with 104 additions and 73 deletions.
diff --git a/Bender.yml b/Bender.yml
@@ -63,6 +63,8 @@ sources:
   - target: any(synthesis,spyglass)
     files:
       # Level 0
+      - test/floo_test_pkg.sv
+      # Level 1
       - src/synth/floo_synth_axi_chimney.sv
       - src/synth/floo_synth_narrow_wide_chimney.sv
       - src/synth/floo_synth_router.sv

diff --git a/src/synth/floo_synth_axi_chimney.sv b/src/synth/floo_synth_axi_chimney.sv
@@ -6,20 +6,20 @@
 
 module floo_synth_axi_chimney
   import floo_pkg::*;
-  import floo_axi_flit_pkg::*;
-  import floo_param_pkg::*;
+  import floo_axi_pkg::*;
+  import floo_test_pkg::*;
 (
   input  logic      clk_i,
   input  logic      rst_ni,
   input  axi_in_req_t  axi_in_req_i,
-  output axi_in_resp_t axi_in_rsp_o,
-  output axi_out_req_t  axi_out_req_o,
-  input  axi_out_resp_t axi_out_rsp_i,
+  output axi_in_rsp_t  axi_in_rsp_o,
+  output axi_out_req_t axi_out_req_o,
+  input  axi_out_rsp_t axi_out_rsp_i,
   input  xy_id_t    xy_id_i,
-  output req_flit_t req_o,
-  output rsp_flit_t rsp_o,
-  input  req_flit_t req_i,
-  input  rsp_flit_t rsp_i
+  output floo_req_t floo_req_o,
+  output floo_rsp_t floo_rsp_o,
+  input  floo_req_t floo_req_i,
+  input  floo_rsp_t floo_rsp_i
 );
 
 
@@ -41,10 +41,10 @@ module floo_synth_axi_chimney
     .axi_out_rsp_i,
     .id_i('0),
     .xy_id_i,
-    .req_o,
-    .rsp_o,
-    .req_i,
-    .rsp_i
+    .floo_req_o,
+    .floo_rsp_o,
+    .floo_req_i,
+    .floo_rsp_i
   );
 
 endmodule
diff --git a/src/synth/floo_synth_narrow_wide_chimney.sv b/src/synth/floo_synth_narrow_wide_chimney.sv
@@ -6,26 +6,26 @@
 
 module floo_synth_narrow_wide_chimney
   import floo_pkg::*;
-  import floo_narrow_wide_flit_pkg::*;
-  import floo_param_pkg::*;
+  import floo_narrow_wide_pkg::*;
+  import floo_test_pkg::*;
 (
   input  logic          clk_i,
   input  logic          rst_ni,
-  input  narrow_in_req_t   narrow_in_req_i,
-  output narrow_in_resp_t  narrow_in_rsp_o,
-  output narrow_out_req_t   narrow_out_req_o,
-  input  narrow_out_resp_t  narrow_out_rsp_i,
-  input  wide_in_req_t     wide_in_req_i,
-  output wide_in_resp_t    wide_in_rsp_o,
-  output wide_out_req_t     wide_out_req_o,
-  input  wide_out_resp_t    wide_out_rsp_i,
+  input  axi_narrow_in_req_t   axi_narrow_in_req_i,
+  output axi_narrow_in_rsp_t  axi_narrow_in_rsp_o,
+  output axi_narrow_out_req_t   axi_narrow_out_req_o,
+  input  axi_narrow_out_rsp_t  axi_narrow_out_rsp_i,
+  input  axi_wide_in_req_t     axi_wide_in_req_i,
+  output axi_wide_in_rsp_t    axi_wide_in_rsp_o,
+  output axi_wide_out_req_t     axi_wide_out_req_o,
+  input  axi_wide_out_rsp_t    axi_wide_out_rsp_i,
   input  xy_id_t        xy_id_i,
-  output narrow_req_flit_t narrow_req_o,
-  output narrow_rsp_flit_t narrow_rsp_o,
-  input  narrow_req_flit_t narrow_req_i,
-  input  narrow_rsp_flit_t narrow_rsp_i,
-  output wide_flit_t wide_o,
-  input  wide_flit_t wide_i
+  output floo_req_t  floo_req_o,
+  output floo_rsp_t  floo_rsp_o,
+  input  floo_req_t  floo_req_i,
+  input  floo_rsp_t  floo_rsp_i,
+  output floo_wide_t floo_wide_o,
+  input  floo_wide_t floo_wide_i
 );
 
 
@@ -50,21 +50,22 @@ floo_narrow_wide_chimney #(
   .test_enable_i(1'b0),
   .sram_cfg_i('0),
   .id_i('0),
+  .id_map_i ('0),
   .xy_id_i,
-  .narrow_in_req_i,
-  .narrow_in_rsp_o,
-  .narrow_out_req_o,
-  .narrow_out_rsp_i,
-  .wide_in_req_i,
-  .wide_in_rsp_o,
-  .wide_out_req_o,
-  .wide_out_rsp_i,
-  .narrow_req_i,
-  .narrow_rsp_o,
-  .narrow_req_o,
-  .narrow_rsp_i,
-  .wide_o,
-  .wide_i
+  .axi_narrow_in_req_i,
+  .axi_narrow_in_rsp_o,
+  .axi_narrow_out_req_o,
+  .axi_narrow_out_rsp_i,
+  .axi_wide_in_req_i,
+  .axi_wide_in_rsp_o,
+  .axi_wide_out_req_o,
+  .axi_wide_out_rsp_i,
+  .floo_req_i,
+  .floo_rsp_o,
+  .floo_req_o,
+  .floo_rsp_i,
+  .floo_wide_o,
+  .floo_wide_i
 );
 
 endmodule
diff --git a/src/synth/floo_synth_router.sv b/src/synth/floo_synth_router.sv
@@ -6,33 +6,33 @@
 
 module floo_synth_router
   import floo_pkg::*;
-  import floo_axi_flit_pkg::*;
-  import floo_param_pkg::*;
+  import floo_axi_pkg::*;
+  import floo_test_pkg::*;
 (
   input  logic   clk_i,
   input  logic   rst_ni,
   input  logic   test_enable_i,
 
   input  xy_id_t xy_id_i,
 
-  input  req_flit_t [NumRoutes-1:0] req_i,
-  input  rsp_flit_t [NumRoutes-1:0] rsp_i,
-  output  req_flit_t [NumRoutes-1:0] req_o,
-  output  rsp_flit_t [NumRoutes-1:0] rsp_o
+  input  floo_req_t [NumRoutes-1:0] req_i,
+  input  floo_rsp_t [NumRoutes-1:0] rsp_i,
+  output  floo_req_t [NumRoutes-1:0] req_o,
+  output  floo_rsp_t [NumRoutes-1:0] rsp_o
 );
 
-  req_data_t [NumRoutes-1:0]    req_in, req_out;
-  rsp_data_t [NumRoutes-1:0]    rsp_in, rsp_out;
+  floo_req_chan_t [NumRoutes-1:0]    req_in, req_out;
+  floo_rsp_chan_t [NumRoutes-1:0]    rsp_in, rsp_out;
   logic [NumRoutes-1:0]         req_valid_in, req_valid_out;
   logic [NumRoutes-1:0]         rsp_valid_in, rsp_valid_out;
   logic [NumRoutes-1:0]         req_ready_in, rsp_ready_in;
   logic [NumRoutes-1:0]         req_ready_out, rsp_ready_out;
 
   for (genvar i = 0; i < NumRoutes; i++) begin : gen_chimney_req
-    assign req_o[i].data = req_out[i];
-    assign rsp_o[i].data = rsp_out[i];
-    assign req_in[i] = req_i[i].data;
-    assign rsp_in[i] = rsp_i[i].data;
+    assign req_o[i].req = req_out[i];
+    assign rsp_o[i].rsp = rsp_out[i];
+    assign req_in[i] = req_i[i].req;
+    assign rsp_in[i] = rsp_i[i].rsp;
     assign req_valid_in[i] = req_i[i].valid;
     assign rsp_valid_in[i] = rsp_i[i].valid;
     assign req_ready_in[i] = req_i[i].ready;
@@ -44,15 +44,15 @@ module floo_synth_router
   end
 
   floo_router #(
-    .NumPhysChannels  ( 1                   ),
-    .NumVirtChannels  ( 1                   ),
-    .NumRoutes        ( NumRoutes           ),
-    .flit_t           ( req_generic_t       ),
-    .ChannelFifoDepth ( ChannelFifoDepth    ),
-    .RouteAlgo        ( XYRouting           ),
-    .IdWidth          ( 4                   ),
-    .id_t             ( xy_id_t             ),
-    .NumAddrRules     ( 1                   )
+    .NumPhysChannels  ( 1                       ),
+    .NumVirtChannels  ( 1                       ),
+    .NumRoutes        ( NumRoutes               ),
+    .flit_t           ( floo_req_generic_flit_t ),
+    .ChannelFifoDepth ( 2                       ),
+    .RouteAlgo        ( XYRouting               ),
+    .IdWidth          ( 4                       ),
+    .id_t             ( xy_id_t                 ),
+    .NumAddrRules     ( 1                       )
   ) i_req_floo_router (
     .clk_i,
     .rst_ni,
@@ -69,15 +69,15 @@ module floo_synth_router
 
 
   floo_router #(
-    .NumPhysChannels  ( 1                 ),
-    .NumVirtChannels  ( 1                 ),
-    .NumRoutes        ( NumRoutes         ),
-    .flit_t           ( rsp_generic_t     ),
-    .ChannelFifoDepth ( ChannelFifoDepth  ),
-    .RouteAlgo        ( XYRouting         ),
-    .IdWidth          ( 4                 ),
-    .id_t             ( xy_id_t           ),
-    .NumAddrRules     ( 1                 )
+    .NumPhysChannels  ( 1                       ),
+    .NumVirtChannels  ( 1                       ),
+    .NumRoutes        ( NumRoutes               ),
+    .flit_t           ( floo_rsp_generic_flit_t ),
+    .ChannelFifoDepth ( ChannelFifoDepth        ),
+    .RouteAlgo        ( XYRouting               ),
+    .IdWidth          ( 4                       ),
+    .id_t             ( xy_id_t                 ),
+    .NumAddrRules     ( 1                       )
   ) i_rsp_floo_router (
     .clk_i,
     .rst_ni,

diff --git a/test/floo_test_pkg.sv b/test/floo_test_pkg.sv
@@ -4,6 +4,8 @@
 //
 // Tim Fischer <[email protected]>
 
+`include "floo_noc/typedef.svh"
+
 package floo_test_pkg;
 
   typedef enum {
@@ -12,4 +14,30 @@ package floo_test_pkg;
     MixedSlave
   } slave_type_e;
 
+  // System parameters
+  localparam int unsigned NumX = 4;
+  localparam int unsigned NumY = 4;
+
+  // Router parameters
+  localparam int unsigned NumRoutes = 5;
+  localparam int unsigned ChannelFifoDepth  = 2;
+  localparam int unsigned OutputFifoDepth   = 2;
+
+  // Chimney parameters
+  localparam bit CutAx = 1'b1;
+  localparam bit CutRsp = 1'b0;
+  localparam int unsigned MaxTxnsPerId = 16;
+  localparam bit RoBSimple = 1'b0;
+  localparam int unsigned ReorderBufferSize = 32'd64;
+
+  // Narrow Wide Chimney parameters
+  localparam bit NarrowRoBSimple = 1'b1;
+  localparam int unsigned NarrowMaxTxnsPerId = 4;
+  localparam int unsigned NarrowReorderBufferSize = 32'd256;
+  localparam bit WideRoBSimple = 1'b0;
+  localparam int unsigned WideMaxTxnsPerId = 32;
+  localparam int unsigned WideReorderBufferSize = 32'd128;
+
+  `FLOO_NOC_TYPEDEF_XY_ID_T(xy_id_t, NumX, NumY)
+
 endpackage