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    • Course material for a basic-level circuit design course using Xschem and ngspice
      Jupyter Notebook
      Apache License 2.0
      41910Updated Nov 26, 2024Nov 26, 2024
    • IIC-OSIC-TOOLS is an all-in-one Docker image for SKY130/GF180/IHP130-based analog and digital chip design. AMD64 and ARM64 are natively supported.
      Python
      Apache License 2.0
      7134962Updated Nov 21, 2024Nov 21, 2024
    • JKU IIC OSIC-Multitool for open-source IC (OSIC) design for SKY130.
      Shell
      Apache License 2.0
      135610Updated Nov 15, 2024Nov 15, 2024
    • A set of rules and recommendations for analog and digital circuit designers.
      Apache License 2.0
      02530Updated Nov 4, 2024Nov 4, 2024
    • A simple 8b input, 8b output freely programmable logic block with optional selectable feedback.
      Verilog
      Apache License 2.0
      0000Updated Nov 2, 2024Nov 2, 2024
    • Simple SPI-based register file (for the testing the flow)
      Verilog
      Apache License 2.0
      0100Updated Oct 31, 2024Oct 31, 2024
    • openlane2

      Public
      The next generation of OpenLane, rewritten from scratch with a modular architecture
      Python
      Apache License 2.0
      38001Updated Sep 3, 2024Sep 3, 2024
    • MPW-8 tapeout submission containing mixed-signal circuit blocks in SKY130
      Verilog
      Apache License 2.0
      0401Updated Sep 3, 2024Sep 3, 2024
    • Vlsir

      Public
      Interchange formats for chip design.
      TypeScript
      BSD 3-Clause "New" or "Revised" License
      9001Updated Aug 11, 2024Aug 11, 2024
    • Fully-differential asynchronous non-binary 12-bit SAR-ADC in SKY130, free to re-use under Apache-2.0 license
      Verilog
      Apache License 2.0
      83800Updated Jul 30, 2024Jul 30, 2024
    • IIC-RALF

      Public
      Reinforcement learning assisted analog layout design flow.
      Python
      Apache License 2.0
      51100Updated Jul 29, 2024Jul 29, 2024
    • Antlr4-based parser for the input files to OpenLane custom IO placers.
      Python
      1001Updated Jul 5, 2024Jul 5, 2024
    • Analog test macro (500kHz ring oscillator, 3-bit DAC) for TinyTapeout 05.
      Tcl
      Apache License 2.0
      2410Updated Jun 14, 2024Jun 14, 2024
    • Flicker noise test cells for the IHP Open-Source PDK (SG13G2) for the MPW Tape-out May 2024.
      Apache License 2.0
      0000Updated Jun 3, 2024Jun 3, 2024
    • Course material for 336.004 (Prof. Pretl) in SS24 at JKU
      Python
      1000Updated May 28, 2024May 28, 2024
    • Implementation of a Sub-Sampling PLL targeting SerDes Applications in SKYWATER PDK 130nm process
      Verilog
      2500Updated Apr 23, 2024Apr 23, 2024
    • TDC based on simple inverter ring
      Verilog
      Apache License 2.0
      2101Updated Mar 30, 2024Mar 30, 2024
    • TDC based on simple inverter chain
      Verilog
      Apache License 2.0
      2400Updated Mar 17, 2024Mar 17, 2024
    • Temperature sensor from standard cells
      Verilog
      Apache License 2.0
      0000Updated Mar 10, 2024Mar 10, 2024
    • A Docker Container based one CentOS 7 to run commercial EDA applications, that require a legacy OS environment.
      Shell
      Apache License 2.0
      0200Updated Feb 14, 2024Feb 14, 2024
    • Helpful Cadence Skill Scrips
      Apache License 2.0
      1100Updated Feb 5, 2024Feb 5, 2024
    • Synthesizable temperature sensor for Tiny Tapeout 03, developed by IIC@JKU.
      Red
      Apache License 2.0
      2052000Updated Jan 1, 2024Jan 1, 2024
    • PLSQL
      Apache License 2.0
      89600Updated Nov 20, 2023Nov 20, 2023
    • OpenVAF

      Public
      An innovative Verilog-A compiler
      Rust
      GNU General Public License v3.0
      23100Updated Nov 1, 2023Nov 1, 2023
    • Documentation for RTL-with-customcells to GDSII
      Verilog
      Apache License 2.0
      1500Updated Oct 25, 2023Oct 25, 2023
    • 130nm BiCMOS Open Source PDK, dedicated for Analog, Mixed Signal and RF Design
      Python
      Apache License 2.0
      65100Updated Oct 24, 2023Oct 24, 2023
    • PMOS power gate for TinyTapeout
      Shell
      Apache License 2.0
      2100Updated Oct 20, 2023Oct 20, 2023
    • A case study of a continuous-time Delta-Sigma modulator including system-level simulations/design of the CT-DSM, circuit-design of the front-end Gm-cell and a mixed-signal simulation w/ Ngspice.
      Jupyter Notebook
      Apache License 2.0
      2100Updated Oct 1, 2023Oct 1, 2023
    • LaTeX Beamer Theme for Johannes Kepler University Linz
      TeX
      Mozilla Public License 2.0
      5100Updated Jul 25, 2023Jul 25, 2023
    • Python
      BSD 3-Clause "New" or "Revised" License
      4000Updated Jul 17, 2023Jul 17, 2023