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Add cva6 specific riscv_instr_gen_tb_top #1862

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CoralieAllioux
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This PR aims to resolve issue #1816

The chosen solution is the same one than the other cores: adapting the riscv_instr_gen_tb_top to cva6.
That module could not be extended as suggested, since it is not a class.

This has been check with VCS 2021.09: the behavior is the same than previous on our side.

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✔️ successful run, report available here.

@JeanRochCoulon JeanRochCoulon merged commit 68f952b into openhwgroup:master Feb 23, 2024
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2 participants