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Populate instruction chapter in CV32A65X Design Document #1820

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Populate instruction chapter in CV32A65X Design Document #1820

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4 changes: 2 additions & 2 deletions docs/01_cva6_user/RISCV_Instructions.rst
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*This chapter is applicable to all configurations.*

RISC-V Instructions
===================
CVA6 RISC-V Instructions
========================

Introduction
------------------
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2 changes: 1 addition & 1 deletion docs/04_cv32a65x_design/source/CSRs.rst
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===

.. toctree::
:hidden:
:maxdepth: 1

csr_list
csr
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2 changes: 1 addition & 1 deletion docs/04_cv32a65x_design/source/functionality.rst
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=============

.. toctree::
:hidden:
:maxdepth: 1

instructions
traps
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22 changes: 21 additions & 1 deletion docs/04_cv32a65x_design/source/instructions.rst
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Original Author: Jean-Roch COULON - Thales

Instructions
============

.. include:: ../../01_cva6_user/RISCV_Instructions.rst
The next first subchapter lists the extensions implemented in CVA6.
By configuration, we can enable/disable the extensions.
CV32A65X supports the extensions described in the next subchapters.
RVZicond, RV32A and RVZifencei extensions are not supported by CV32A65X.


.. toctree::
:maxdepth: 1

../../01_cva6_user/RISCV_Instructions
../../01_cva6_user/RISCV_Instructions_RV32I
../../01_cva6_user/RISCV_Instructions_RV32M
../../01_cva6_user/RISCV_Instructions_RV32C
../../01_cva6_user/RISCV_Instructions_RV32ZCb
../../01_cva6_user/RISCV_Instructions_RVZba
../../01_cva6_user/RISCV_Instructions_RVZbb
../../01_cva6_user/RISCV_Instructions_RVZbc
../../01_cva6_user/RISCV_Instructions_RVZbs
../../01_cva6_user/RISCV_Instructions_RVZicsr
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