Fix HPDCache to make it functional when ways=2 #1744
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@Gchauvon Can you approve it ? |
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Hello @AyoubJalali |
I'll debug it !! |
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@cfuguet When HPDcache is configured with 2 ways of 2048 bytes, it fails. To be discussed at the workshop. See u |
Oh ! I will check this. In theory, there is no reason why the HPDcache does not support this configuration. |
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The HPDCache package does not compile when number of ways = 2 As HPDCACHE_DATA_RAM_Y_CUTS = HPDCACHE_WAYS / HPDCACHE_DATA_WAYS_PER_RAM_WORD,
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Ok ! now I see why. The issue comes from the computation of the HPDCACHE_DATA_WAYS_PER_RAM_WORD parameter. It is currently computed as 128 (bits) / PARAM_WORD_WIDTH. In the embedded case, PARAM_WORD_WIDTH is 32, then the HPDcache expects to be able to fit 4 ways in a single word of the RAM. If the number of ways is less than 4, you have a bad computation of the HPDCACHE_DATA_RAM_Y_CUTS parameter which in this case will be 0... It should be at least 1. I will change the way that the HPDCACHE_DATA_WAYS_PER_RAM_WORD parameter is computed in the core/include/cva6_hpdcache_default_config_pkg.sv. That should fix the issue. I will let you know when it is done. I can either push the commit in this PR or make another Pull-Request on the CVA6, what is your preference ? Thank you @JeanRochCoulon, César |
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Committing in the current PR could test the HPDCache fix, let's commit in it. |
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Ok ! let me do a quick local test and then I will push the modifications |
Signed-off-by: Cesar Fuguet <[email protected]>
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| function int unsigned __maxu(int unsigned x, int unsigned y); | ||
| return y < x ? x : y; |
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[verible-verilog-format] reported by reviewdog 🐶
| return y < x ? x : y; | |
| return y < x ? x : y; |
| localparam int unsigned PARAM_DATA_WAYS_PER_RAM_WORD = | ||
| __minu(__MAX_RAM_WORD_BITS / PARAM_WORD_WIDTH, PARAM_WAYS); |
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[verible-verilog-format] reported by reviewdog 🐶
| localparam int unsigned PARAM_DATA_WAYS_PER_RAM_WORD = | |
| __minu(__MAX_RAM_WORD_BITS / PARAM_WORD_WIDTH, PARAM_WAYS); | |
| localparam int unsigned PARAM_DATA_WAYS_PER_RAM_WORD = __minu( | |
| __MAX_RAM_WORD_BITS / PARAM_WORD_WIDTH, PARAM_WAYS | |
| ); |
| endfunction | ||
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| function int unsigned __maxu(int unsigned x, int unsigned y); | ||
| return y < x ? x : y; |
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[verible-verilog-format] reported by reviewdog 🐶
| return y < x ? x : y; | |
| return y < x ? x : y; |
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@JeanRochCoulon, FYI, this should fix issues on simulation, but it may fail on synthesis. Actually when the HPDCACHE_DATA_RAM_Y_CUTS = 1, there are some types that have null ranges ([$clog2(HPDCACHE_DATA_RAM_Y_CUTS)-1:0] => [-1:0]). This is not well supported by some tools. I will open an issue on the HPDcache and make a fix ASAP to support correctly this case. |
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JeanRochCoulon
changed the title
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ok, thanks for the information. I will commit your fix and resize the I and D cache in another PR. |
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In embedded configuration, caches do not need to be so big.