Draft: User config

Bender.yml

@@ -80,8 +80,6 @@ sources:
       # Packages
       - core/include/wt_cache_pkg.sv
       - core/include/std_cache_pkg.sv
-      - core/include/acc_pkg.sv
-
       # for all the below files use Flist.cva6 as baseline and also look at Makefile pd/synth
       # CVXIF
       - core/include/instr_tracer_pkg.sv

Flist.ariane

@@ -24,7 +24,6 @@ core/include/riscv_pkg.sv
 corev_apu/riscv-dbg/src/dm_pkg.sv
 vendor/openhwgroup/cvfpu/src/fpnew_pkg.sv
 core/include/ariane_pkg.sv
-core/include/acc_pkg.sv
 corev_apu/tb/ariane_soc_pkg.sv
 vendor/pulp-platform/axi/src/axi_pkg.sv
 corev_apu/tb/ariane_axi_pkg.sv

common/local/util/instr_tracer.sv

@@ -17,9 +17,11 @@
 `include "ex_trace_item.svh"
 `include "instr_trace_item.svh"
 
-module instr_tracer (
+module instr_tracer #(
+  parameter config_pkg::cva6_cfg_t CVA6Cfg = config_pkg::cva6_cfg_empty
+)(
   instr_tracer_if   tracer_if,
-  input logic[riscv::XLEN-1:0] hart_id_i
+  input logic[CVA6Cfg.XLEN-1:0] hart_id_i
 );
 
   // keep the decoded instructions in a queue

core/Flist.cva6

@@ -56,9 +56,9 @@ ${CVA6_REPO_DIR}/vendor/openhwgroup/cvfpu/src/fpu_div_sqrt_mvp/hdl/norm_div_sqrt
 ${CVA6_REPO_DIR}/vendor/openhwgroup/cvfpu/src/fpu_div_sqrt_mvp/hdl/nrbd_nrsc_mvp.sv
 ${CVA6_REPO_DIR}/vendor/openhwgroup/cvfpu/src/fpu_div_sqrt_mvp/hdl/preprocess_mvp.sv
 
+${CVA6_REPO_DIR}/core/include/riscv_pkg.sv
 ${CVA6_REPO_DIR}/core/include/config_pkg.sv
 ${CVA6_REPO_DIR}/core/include/${TARGET_CFG}_config_pkg.sv
-${CVA6_REPO_DIR}/core/include/riscv_pkg.sv
 // Note: depends on fpnew_pkg, above
 ${CVA6_REPO_DIR}/core/include/ariane_pkg.sv
 ${CVA6_REPO_DIR}/vendor/pulp-platform/axi/src/axi_pkg.sv
@@ -67,7 +67,6 @@ ${CVA6_REPO_DIR}/vendor/pulp-platform/axi/src/axi_pkg.sv
 ${CVA6_REPO_DIR}/core/include/wt_cache_pkg.sv
 ${CVA6_REPO_DIR}/core/include/std_cache_pkg.sv
 ${CVA6_REPO_DIR}/core/include/instr_tracer_pkg.sv
-${CVA6_REPO_DIR}/core/include/acc_pkg.sv
 
 //CVXIF
 ${CVA6_REPO_DIR}/core/include/cvxif_pkg.sv

core/acc_dispatcher.sv

@@ -18,8 +18,40 @@ module acc_dispatcher
   import riscv::*;
 #(
     parameter config_pkg::cva6_cfg_t CVA6Cfg    = config_pkg::cva6_cfg_empty,
-    parameter type                   acc_req_t  = acc_pkg::accelerator_req_t,
-    parameter type                   acc_resp_t = acc_pkg::accelerator_resp_t,
+    parameter type exception_t = logic,
+    parameter type                   fu_data_t  = logic,
+    parameter type scoreboard_entry_t = logic,
+    parameter type dcache_req_i_t = logic,
+    parameter type dcache_req_o_t = logic,
+    parameter type acc_req_t = struct packed {
+      logic                                 req_valid;
+      logic                                 resp_ready;
+      riscv::instruction_t                  insn;
+      logic [CVA6Cfg.XLEN-1:0]                         rs1;
+      logic [CVA6Cfg.XLEN-1:0]                         rs2;
+      fpnew_pkg::roundmode_e                frm;
+      logic [CVA6Cfg.TRANS_ID_BITS-1:0] trans_id;
+      logic                                 store_pending;
+      // Invalidation interface
+      logic                                 acc_cons_en;
+      logic                                 inval_ready;
+    },
+    parameter type acc_resp_t = struct packed {
+      logic                                 req_ready;
+      logic                                 resp_valid;
+      logic [CVA6Cfg.XLEN-1:0]                         result;
+      logic [CVA6Cfg.TRANS_ID_BITS-1:0] trans_id;
+      logic                                 error;
+      // Metadata
+      logic                                 store_pending;
+      logic                                 store_complete;
+      logic                                 load_complete;
+      logic [4:0]                           fflags;
+      logic                                 fflags_valid;
+      // Invalidation interface
+      logic                                 inval_valid;
+      logic [63:0]                          inval_addr;
+    },
     parameter type                   acc_cfg_t  = logic,
     parameter acc_cfg_t              AccCfg     = '0
 ) (
@@ -38,8 +70,8 @@ module acc_dispatcher
     output logic issue_stall_o,
     input fu_data_t fu_data_i,
     input scoreboard_entry_t [CVA6Cfg.NrCommitPorts-1:0] commit_instr_i,
-    output logic [TRANS_ID_BITS-1:0] acc_trans_id_o,
-    output xlen_t acc_result_o,
+    output logic [CVA6Cfg.TRANS_ID_BITS-1:0] acc_trans_id_o,
+    output logic [CVA6Cfg.XLEN-1:0] acc_result_o,
     output logic acc_valid_o,
     output exception_t acc_exception_o,
     // Interface with the execute stage
@@ -123,14 +155,15 @@ module acc_dispatcher
   logic                                            acc_insn_queue_empty;
   logic     [idx_width(InstructionQueueDepth)-1:0] acc_insn_queue_usage;
   logic                                            acc_commit;
-  logic     [                   TRANS_ID_BITS-1:0] acc_commit_trans_id;
+  logic     [                   CVA6Cfg.TRANS_ID_BITS-1:0] acc_commit_trans_id;
 
   assign acc_data = acc_valid_ex_o ? fu_data_i : '0;
 
   fifo_v3 #(
       .DEPTH       (InstructionQueueDepth),
       .FALL_THROUGH(1'b1),
-      .dtype       (fu_data_t)
+      .dtype       (fu_data_t),
+      .FPGA_EN     (CVA6Cfg.FPGA_EN)
   ) i_acc_insn_queue (
       .clk_i     (clk_i),
       .rst_ni    (rst_ni),
@@ -153,13 +186,13 @@ module acc_dispatcher
    **********************************/
 
   // Keep track of the instructions that were received by the dispatcher.
-  logic [NR_SB_ENTRIES-1:0] insn_pending_d, insn_pending_q;
+  logic [CVA6Cfg.NR_SB_ENTRIES-1:0] insn_pending_d, insn_pending_q;
   `FF(insn_pending_q, insn_pending_d, '0)
 
   // Only non-speculative instructions can be issued to the accelerators.
   // The following block keeps track of which transaction IDs reached the
   // top of the scoreboard, and are therefore no longer speculative.
-  logic [NR_SB_ENTRIES-1:0] insn_ready_d, insn_ready_q;
+  logic [CVA6Cfg.NR_SB_ENTRIES-1:0] insn_ready_d, insn_ready_q;
   `FF(insn_ready_q, insn_ready_d, '0)
 
   always_comb begin : p_non_speculative_ff
@@ -186,13 +219,13 @@ module acc_dispatcher
    *  Accelerator request  *
    *************************/
 
-  acc_pkg::accelerator_req_t acc_req;
+  acc_req_t acc_req;
   logic                      acc_req_valid;
   logic                      acc_req_ready;
 
-  acc_pkg::accelerator_req_t acc_req_int;
+  acc_req_t acc_req_int;
   fall_through_register #(
-      .T(acc_pkg::accelerator_req_t)
+      .T(acc_req_t)
   ) i_accelerator_req_register (
       .clk_i     (clk_i),
       .rst_ni    (rst_ni),
@@ -223,7 +256,7 @@ module acc_dispatcher
     acc_req            = '0;
     acc_req_valid      = 1'b0;
 
-    // Unpack fu_data_t into accelerator_req_t
+    // Unpack fu_data_t into acc_req_t
     if (!acc_insn_queue_empty) begin
       acc_req = '{
           // Instruction is forwarded from the decoder as an immediate