cva6_icache: Allow one outstanding killed miss #1497
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Good catch, the execution is faster! Your PR triggers this assertion: |
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@colluca can you rebase to solve the conflicts ? |
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Hello @colluca Since 4 weeks the PR is open... To be able to help in fixing the current issues, can you rebase the PR ? |
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Hi @JeanRochCoulon, sorry I'm very busy at the moment and could only have a deep look at it after mid November, but I have rebased it as requested. |
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Ok, I will relaunch the Thales CI |
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Hello @colluca, |
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@cathales That would be great, now I have time to get back to this work item :) |
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👋 Hi there! This pull request seems inactive. Need more help or have updates? Feel free to let us know. If there are no updates within the next few days, we'll go ahead and close this PR. 😊 |
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Hello @colluca Do you have time to look at it ? |
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As this PR cannot be merged. I close it and open a github issue to log the issue #1785. |
This PR relates to the following behaviour.
The I$ can receive a speculative request from the instruction fetch unit (e.g. upon a branch). If this instruction is not in the cache we will incur a miss and a refill request will be issued to the memory. If, when the branch is resolved, the speculated instruction is killed, the refill request will be killed (i.e. the speculated instruction will never be loaded into the cache). Despite being killed, the I$ still waits on the request from memory to be back, stalling all other operation. This implies that even with a hot cache, we can still experience cache miss stalls on speculated instructions which will never enter the cache, and hence the cache will never truely be "hot" (in this sense, speculated instructions should be considered part of the working set).
This PR attempts to improve performance in this condition by handling up to one killed refill request asynchronously. A speculated miss will only induce a stall if another miss occurs before the killed refill returns from memory.