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Bypass misaligned address exception info in case of no MMU #1457

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Sep 21, 2023
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2 changes: 1 addition & 1 deletion .gitlab-ci/expected_synth.yml
Original file line number Diff line number Diff line change
Expand Up @@ -3,4 +3,4 @@ cv64a6_imafdc_sv39:
cv32a60x:
gates: 160719
cv32a6_embedded:
gates: 127388
gates: 129129
4 changes: 2 additions & 2 deletions core/load_store_unit.sv
Original file line number Diff line number Diff line change
Expand Up @@ -228,15 +228,15 @@ module load_store_unit import ariane_pkg::*; #(
assign dtlb_ppn = mmu_vaddr_plen[riscv::PLEN-1:12];
assign dtlb_hit = 1'b1;

assign mmu_exception = '0;

always_ff @(posedge clk_i or negedge rst_ni) begin
if (~rst_ni) begin
mmu_paddr <= '0;
translation_valid <= '0;
mmu_exception <= '0;
end else begin
mmu_paddr <= mmu_vaddr_plen;
translation_valid <= translation_req;
mmu_exception <= misaligned_exception;
end
end
end
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