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try fixing weird splits issues
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AngelaGonzalezMarino committed Dec 19, 2023
1 parent 9d0b9ec commit d26612f
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Showing 2 changed files with 11 additions and 11 deletions.
6 changes: 3 additions & 3 deletions core/mmu_unify/cva6_ptw.sv
Original file line number Diff line number Diff line change
Expand Up @@ -185,9 +185,9 @@ module cva6_ptw
);


assign req_port_o.data_be = riscv::XLEN ==32?
be_gen_32(req_port_o.address_index[1:0], req_port_o.data_size):
be_gen(req_port_o.address_index[2:0], req_port_o.data_size);
assign req_port_o.data_be = (riscv::XLEN == 32) ?
be_gen_32(req_port_o.address_index[1:0], req_port_o.data_size) :
be_gen(req_port_o.address_index[2:0], req_port_o.data_size);

//-------------------
// Page table walker
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16 changes: 8 additions & 8 deletions core/mmu_unify/cva6_tlb.sv
Original file line number Diff line number Diff line change
Expand Up @@ -179,14 +179,14 @@ module cva6_tlb
shift = '0;
new_index = '0;
// The PLRU-tree indexing:
// lvl0 0
// / \
// / \
// lvl1 1 2
// / \ / \
// lvl2 3 4 5 6
// / \ /\/\ /\
// ... ... ... ...
// | lvl0 0 |
// | / \ |
// | / \ |
// | lvl1 1 2 |
// | / \ / \ |
// | lvl2 3 4 5 6 |
// | / \ /\/\ /\ |
// | ... ... ... ... |
// Just predefine which nodes will be set/cleared
// E.g. for a TLB with 8 entries, the for-loop is semantically
// equivalent to the following pseudo-code:
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