Skip to content

Commit

Permalink
Fix gate simulation: Update hpdcache_sram black box (#2632)
Browse files Browse the repository at this point in the history
Update hpdcache_sram black box which changed with bump of hpdcache repository
  • Loading branch information
Gchauvon authored Nov 27, 2024
1 parent 6ee7a7d commit 7c326f5
Show file tree
Hide file tree
Showing 4 changed files with 8 additions and 7 deletions.
5 changes: 3 additions & 2 deletions .gitlab-ci.yml
Original file line number Diff line number Diff line change
Expand Up @@ -275,6 +275,7 @@ asic-synthesis:
- echo $DV_TARGET
- source ./verif/sim/setup-env.sh
- git clone ${SYNTH_SCRIPT} ${SYNTH_SCRIPT_PATH} -b ${SYNTH_SCRIPT_BRANCH}
- git -C ${SYNTH_SCRIPT_PATH} checkout 1e166766d2c91ca905577cccc70813a2a8bbefc2
- cp -r ${SYNTH_SCRIPT_PATH}/cva6/ ../
- git apply ${SYNTH_SCRIPT_PATH}/patches/*.patch
- echo $SYN_DCSHELL_BASHRC; source $SYN_DCSHELL_BASHRC
Expand Down Expand Up @@ -544,8 +545,8 @@ simu-gate:
- !reference [.copy_spike_artifacts]
- echo $PERIOD
- source ./verif/sim/setup-env.sh
- git clone ${SYNTH_SCRIPT} ${SYNTH_SCRIPT_PATH} -b testelf
- git -C ${SYNTH_SCRIPT_PATH} checkout cb92f846
- git clone ${SYNTH_SCRIPT} ${SYNTH_SCRIPT_PATH} -b ${SYNTH_SCRIPT_BRANCH}
- git -C ${SYNTH_SCRIPT_PATH} checkout 1e166766d2c91ca905577cccc70813a2a8bbefc2
- cp -r ${SYNTH_SCRIPT_PATH}/cva6/ ../
- git apply ${SYNTH_SCRIPT_PATH}/patches/*.patch
- source verif/regress/install-riscv-tests.sh
Expand Down
2 changes: 1 addition & 1 deletion core/Flist.cva6_gate
Original file line number Diff line number Diff line change
Expand Up @@ -62,7 +62,7 @@ ${CVA6_REPO_DIR}/pd/synth/cva6_${TARGET_CFG}_synth.v
# Dedicated to black box in caches, cv32a65x only
${CVA6_REPO_DIR}/pd/synth/tc_sram_wrapper_256_64_00000008_00000001_00000001_none_0.sv
${CVA6_REPO_DIR}/pd/synth/hpdcache_sram_wbyteenable_1rw_00000007_00000040_00000080.sv
${CVA6_REPO_DIR}/pd/synth/hpdcache_sram_1rw_00000006_0000001a_00000040.sv
${CVA6_REPO_DIR}/pd/synth/hpdcache_sram_1rw_00000006_0000001c_00000040.sv

${CVA6_REPO_DIR}/common/local/util/tc_sram_wrapper.sv
${CVA6_REPO_DIR}/common/local/util/tc_sram_wrapper_cache_techno.sv
Expand Down
2 changes: 1 addition & 1 deletion pd/synth/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -60,7 +60,7 @@ rm_synth: pre_cva6_synth
cp Flist.cva6_synth ../../$(SYNTH_FLOW_NAME)/synth/
CVA6_REPO_DIR=$(CVA6_REPO_DIR) make -C ../../$(SYNTH_FLOW_NAME)/synth/ platform_synth_topo
sed -i -n -e '/module hpdcache_sram_wbyteenable_1rw_00000007_00000040_00000080/,/endmodule/!p' $(DESIGN_NAME)_$(TARGET)_synth.v
sed -i -n -e '/module hpdcache_sram_1rw_00000006_0000001a_00000040/,/endmodule/!p' $(DESIGN_NAME)_$(TARGET)_synth.v
sed -i -n -e '/module hpdcache_sram_1rw_00000006_0000001c_00000040/,/endmodule/!p' $(DESIGN_NAME)_$(TARGET)_synth.v
echo $(NAND2_AREA) > $(DESIGN_NAME)_$(TARGET)/nand2area.txt

cva6_read:
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -23,10 +23,10 @@
* Description : SRAM behavioral model
* History :
*/
module hpdcache_sram_1rw_00000006_0000001a_00000040
module hpdcache_sram_1rw_00000006_0000001c_00000040
#(
parameter int unsigned ADDR_SIZE = 6,
parameter int unsigned DATA_SIZE = 26,
parameter int unsigned DATA_SIZE = 28,
parameter int unsigned DEPTH = 2**ADDR_SIZE
)
(
Expand Down Expand Up @@ -57,4 +57,4 @@ module hpdcache_sram_1rw_00000006_0000001a_00000040
rdata <= mem[addr];
end
end : mem_update_ff
endmodule : hpdcache_sram_1rw_00000006_0000001a_00000040
endmodule : hpdcache_sram_1rw_00000006_0000001c_00000040

0 comments on commit 7c326f5

Please sign in to comment.