remove round interval (#2353)

openhwgroup · Jul 11, 2024 · 5fcc39d · 5fcc39d
1 parent 18bfc23
commit 5fcc39d
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Showing 6 changed files with 3 additions and 71 deletions.
diff --git a/.gitlab-ci/expected_synth.yml b/.gitlab-ci/expected_synth.yml
@@ -1,2 +1,2 @@
 cv32a65x:
-  gates: 162333
+  gates: 162197
diff --git a/Bender.yml b/Bender.yml
@@ -110,7 +110,6 @@ sources:
       - core/ariane_regfile_ff.sv
       - core/ariane_regfile_fpga.sv
       - core/scoreboard.sv
-      - core/round_interval.sv
       - core/store_buffer.sv
       - core/amo_buffer.sv
       - core/store_unit.sv

diff --git a/Flist.ariane b/Flist.ariane
@@ -94,7 +94,6 @@ core/mmu_sv39x4/ptw_sv39x4.sv
 core/ariane_regfile_ff.sv
 core/re_name.sv
 core/scoreboard.sv
-core/round_interval.sv
 core/store_buffer.sv
 core/amo_buffer.sv
 core/store_unit.sv

diff --git a/core/Flist.cva6 b/core/Flist.cva6
@@ -126,7 +126,6 @@ ${CVA6_REPO_DIR}/core/ariane_regfile_ff.sv
 ${CVA6_REPO_DIR}/core/ariane_regfile_fpga.sv
 // NOTE: scoreboard.sv modified for DSIM (unchanged for other simulators)
 ${CVA6_REPO_DIR}/core/scoreboard.sv
-${CVA6_REPO_DIR}/core/round_interval.sv
 ${CVA6_REPO_DIR}/core/store_buffer.sv
 ${CVA6_REPO_DIR}/core/amo_buffer.sv
 ${CVA6_REPO_DIR}/core/store_unit.sv

diff --git a/core/round_interval.sv b/core/round_interval.sv
diff --git a/core/scoreboard.sv b/core/scoreboard.sv
@@ -242,10 +242,8 @@ module scoreboard #(
     // ------------
     if (CVA6Cfg.SpeculativeSb) begin
       if (bmiss) begin
-        for (int unsigned i = 0; i < CVA6Cfg.NR_SB_ENTRIES; i++) begin
-          if (speculative_instrs[i]) begin
-            mem_n[i].cancelled = 1'b1;
-          end
+        if (after_flu_wb != issue_pointer[0]) begin
+          mem_n[after_flu_wb].cancelled = 1'b1;
         end
       end
     end
@@ -280,16 +278,6 @@ module scoreboard #(
   assign bmiss = resolved_branch_i.valid && resolved_branch_i.is_mispredict;
   assign after_flu_wb = trans_id_i[ariane_pkg::FLU_WB] + 'd1;
 
-  if (CVA6Cfg.SpeculativeSb) begin : find_speculative_instrs
-    round_interval #(
-        .S(CVA6Cfg.TRANS_ID_BITS)
-    ) i_speculative_instrs (
-        .start_i (after_flu_wb),
-        .stop_i  (issue_pointer_q),
-        .active_o(speculative_instrs)
-    );
-  end
-
   // FIFO counter updates
   if (CVA6Cfg.NrCommitPorts == 2) begin : gen_commit_ports
     assign num_commit = commit_ack_i[1] + commit_ack_i[0];