axi_riscv_atomics: Upgrade to v0.8.2

Signed-off-by: Nils Wistoff <[email protected]>
openhwgroup · Dec 7, 2023 · 5a7f399 · 5a7f399
1 parent 1f740f5
commit 5a7f399
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Showing 4 changed files with 8 additions and 1 deletion.
diff --git a/Makefile b/Makefile
@@ -174,6 +174,11 @@ src :=  core/include/$(target)_config_pkg.sv
         vendor/pulp-platform/common_cells/src/rstgen.sv                              \
         vendor/pulp-platform/common_cells/src/addr_decode.sv                         \
 	vendor/pulp-platform/common_cells/src/stream_register.sv                     \
+        vendor/pulp-platform/common_cells/src/id_queue.sv                            \
+        vendor/pulp-platform/common_cells/src/stream_fork.sv                         \
+        vendor/pulp-platform/common_cells/src/fall_through_register.sv               \
+        vendor/pulp-platform/common_cells/src/onehot_to_bin.sv                       \
+        vendor/pulp-platform/common_cells/src/stream_filter.sv                       \
         vendor/pulp-platform/axi/src/axi_cut.sv                                      \
         vendor/pulp-platform/axi/src/axi_join.sv                                     \
         vendor/pulp-platform/axi/src/axi_delayer.sv                                  \

diff --git a/corev_apu/fpga/src/ariane_xilinx.sv b/corev_apu/fpga/src/ariane_xilinx.sv
@@ -978,6 +978,7 @@ axi_riscv_atomics_wrap #(
     .AXI_DATA_WIDTH ( AxiDataWidth     ),
     .AXI_ID_WIDTH   ( AxiIdWidthSlaves ),
     .AXI_USER_WIDTH ( AxiUserWidth     ),
+    .AXI_MAX_READ_TXNS  ( 1  ),
     .AXI_MAX_WRITE_TXNS ( 1  ),
     .RISCV_WORD_WIDTH   ( 64 )
 ) i_axi_riscv_atomics (

diff --git a/corev_apu/src/axi_riscv_atomics b/corev_apu/src/axi_riscv_atomics
diff --git a/corev_apu/tb/ariane_testharness.sv b/corev_apu/tb/ariane_testharness.sv
@@ -419,6 +419,7 @@ module ariane_testharness #(
     .AXI_DATA_WIDTH ( AXI_DATA_WIDTH               ),
     .AXI_ID_WIDTH   ( ariane_axi_soc::IdWidthSlave ),
     .AXI_USER_WIDTH ( AXI_USER_WIDTH               ),
+    .AXI_MAX_READ_TXNS  ( 1  ),
     .AXI_MAX_WRITE_TXNS ( 1  ),
     .RISCV_WORD_WIDTH   ( 64 )
   ) i_axi_riscv_atomics (
+24 −0		.github/workflows/gitlab-ci.yml
+13 −0		.gitignore
+36 −0		.gitlab-ci.yml
+17 −2		Bender.yml
+73 −1		CHANGELOG.md
+22 −0		scripts/compile_vsim.sh
+7 −0		scripts/run_vsim.sh
+18 −22		src/axi_res_tbl.sv
+129 −49		src/axi_riscv_amos.sv
+151 −0		src/axi_riscv_amos_wrap.sv
+286 −99		src/axi_riscv_atomics.sv
+85 −0		src/axi_riscv_atomics_structs.sv
+20 −2		src/axi_riscv_atomics_wrap.sv
+815 −241		src/axi_riscv_lrsc.sv
+21 −6		src/axi_riscv_lrsc_wrap.sv
+12 −0		src_files.yml
+4 −1		test/axi_riscv_atomics_synth.v
+809 −0		test/axi_riscv_atomics_tb.sv
+726 −0		test/axi_riscv_atomics_tb_wave.do
+13 −8		test/axi_riscv_lrsc_synth.v
+690 −0		test/axi_riscv_lrsc_tb.sv
+208 −0		test/axi_riscv_lrsc_tb_wave.do
+394 −0		test/golden_memory.sv
+220 −0		test/tb_axi_pkg.sv