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Code_coverage: Add conditions for the MMU
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Signed-off-by: Alae Eddine Ez zejjari <[email protected]>
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@AEzzejjari
AEzzejjari committed Oct 6, 2023
1 parent 1a452fb commit 2dec551
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Showing 4 changed files with 41 additions and 32 deletions.
2 changes: 1 addition & 1 deletion core/csr_regfile.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -1084,7 +1084,7 @@ module csr_regfile import ariane_pkg::*; #(
// ------------------------------
// Set the address translation at which the load and stores should occur
// we can use the previous values since changing the address translation will always involve a pipeline flush
if (mprv && riscv::vm_mode_t'(satp_q.mode) == riscv::MODE_SV && (mstatus_q.mpp != riscv::PRIV_LVL_M))
if (ariane_pkg::MMU_PRESENT && mprv && riscv::vm_mode_t'(satp_q.mode) == riscv::MODE_SV && (mstatus_q.mpp != riscv::PRIV_LVL_M))
en_ld_st_translation_d = 1'b1;
else // otherwise we go with the regular settings
en_ld_st_translation_d = en_translation_o;
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2 changes: 1 addition & 1 deletion core/load_store_unit.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -447,7 +447,7 @@ module load_store_unit import ariane_pkg::*; #(
end
end

if (en_ld_st_translation_i && lsu_ctrl.overflow) begin
if (ariane_pkg::MMU_PRESENT && en_ld_st_translation_i && lsu_ctrl.overflow) begin

if (lsu_ctrl.fu == LOAD) begin
misaligned_exception = {
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57 changes: 32 additions & 25 deletions core/load_unit.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -216,15 +216,17 @@ module load_unit import ariane_pkg::*; #(
if (!req_port_i.data_gnt) begin
state_d = WAIT_GNT;
end else begin
if (dtlb_hit_i && !stall_ni) begin
// we got a grant and a hit on the DTLB so we can send the tag in the next cycle
state_d = SEND_TAG;
pop_ld_o = 1'b1;
// translation valid but this is to NC and the WB is not yet empty.
end else if (dtlb_hit_i && stall_ni) begin
state_d = ABORT_TRANSACTION_NI;
end else begin // TLB miss
if (ariane_pkg::MMU_PRESENT && !dtlb_hit_i) begin
state_d = ABORT_TRANSACTION;
end else begin
if (!stall_ni) begin
// we got a grant and a hit on the DTLB so we can send the tag in the next cycle
state_d = SEND_TAG;
pop_ld_o = 1'b1;
// translation valid but this is to NC and the WB is not yet empty.
end else begin
state_d = ABORT_TRANSACTION_NI;
end
end
end
end else begin
Expand Down Expand Up @@ -281,16 +283,19 @@ module load_unit import ariane_pkg::*; #(
// we finally got a data grant
if (req_port_i.data_gnt) begin
// so we send the tag in the next cycle
if (dtlb_hit_i && !stall_ni) begin
state_d = SEND_TAG;
pop_ld_o = 1'b1;
// translation valid but this is to NC and the WB is not yet empty.
end else if (dtlb_hit_i && stall_ni) begin
state_d = ABORT_TRANSACTION_NI;
end else begin
// should we not have hit on the TLB abort this transaction an retry later
if (ariane_pkg::MMU_PRESENT && !dtlb_hit_i) begin
state_d = ABORT_TRANSACTION;
end else begin
if (!stall_ni) begin
// we got a grant and a hit on the DTLB so we can send the tag in the next cycle
state_d = SEND_TAG;
pop_ld_o = 1'b1;
// translation valid but this is to NC and the WB is not yet empty.
end else begin
state_d = ABORT_TRANSACTION_NI;
end
end

end
// otherwise we keep waiting on our grant
end
Expand All @@ -312,15 +317,17 @@ module load_unit import ariane_pkg::*; #(
state_d = WAIT_GNT;
end else begin
// we got a grant so we can send the tag in the next cycle
if (dtlb_hit_i && !stall_ni) begin
// we got a grant and a hit on the DTLB so we can send the tag in the next cycle
state_d = SEND_TAG;
pop_ld_o = 1'b1;
// translation valid but this is to NC and the WB is not yet empty.
end else if (dtlb_hit_i && stall_ni) begin
state_d = ABORT_TRANSACTION_NI;
if (ariane_pkg::MMU_PRESENT && !dtlb_hit_i) begin
state_d = ABORT_TRANSACTION;
end else begin
state_d = ABORT_TRANSACTION;// we missed on the TLB -> wait for the translation
if (!stall_ni) begin
// we got a grant and a hit on the DTLB so we can send the tag in the next cycle
state_d = SEND_TAG;
pop_ld_o = 1'b1;
// translation valid but this is to NC and the WB is not yet empty.
end else begin
state_d = ABORT_TRANSACTION_NI;
end
end
end
end else begin
Expand Down Expand Up @@ -380,7 +387,7 @@ module load_unit import ariane_pkg::*; #(
// the output is also valid if we got an exception. An exception arrives one cycle after
// dtlb_hit_i is asserted, i.e. when we are in SEND_TAG. Otherwise, the exception
// corresponds to the next request that is already being translated (see below).
if (ex_i.valid && (state_q == SEND_TAG)) begin
if(ex_i.valid && (state_q == SEND_TAG)) begin
valid_o = 1'b1;
ex_o.valid = 1'b1;
end
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12 changes: 7 additions & 5 deletions core/store_unit.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -97,7 +97,7 @@ module store_unit import ariane_pkg::*; #(
pop_st_o = 1'b1;
// check if translation was valid and we have space in the store buffer
// otherwise simply stall
if (!dtlb_hit_i) begin
if (ariane_pkg::MMU_PRESENT && !dtlb_hit_i) begin
state_d = WAIT_TRANSLATION;
pop_st_o = 1'b0;
end
Expand All @@ -124,7 +124,7 @@ module store_unit import ariane_pkg::*; #(
state_d = VALID_STORE;
pop_st_o = 1'b1;

if (!dtlb_hit_i) begin
if(ariane_pkg::MMU_PRESENT && !dtlb_hit_i) begin
state_d = WAIT_TRANSLATION;
pop_st_o = 1'b0;
end
Expand Down Expand Up @@ -153,10 +153,12 @@ module store_unit import ariane_pkg::*; #(
// but we know that the store queue is not full as we could only have landed here if
// it wasn't full
WAIT_TRANSLATION: begin
translation_req_o = 1'b1;
if(ariane_pkg::MMU_PRESENT) begin
translation_req_o = 1'b1;

if (dtlb_hit_i) begin
state_d = IDLE;
if (dtlb_hit_i) begin
state_d = IDLE;
end
end
end
endcase
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