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[HOT FIX] Add else to SRET instruction decode (#1595) #1651

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[HOT FIX] Add else to SRET instruction decode (#1595)

[HOT FIX] Add else to SRET instruction decode (#1595) #1651

Run time

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Job Run time
riscv-tests (asm-tests, cv64a6_imafdc_sv39)
1h 14m 40s
riscv-tests (asm-tests, cv64a6_imafdc_sv39_wb)
1h 26m 17s
riscv-tests (mul, cv64a6_imafdc_sv39)
46m 47s
riscv-tests (mul, cv64a6_imafdc_sv39_wb)
44m 13s
riscv-tests (amo, cv64a6_imafdc_sv39)
58m 52s
riscv-tests (amo, cv64a6_imafdc_sv39_wb)
1h 4m 44s
riscv-tests (fp, cv64a6_imafdc_sv39)
46m 36s
riscv-tests (fp, cv64a6_imafdc_sv39_wb)
56m 4s
riscv-tests (benchmarks, cv64a6_imafdc_sv39)
33m 56s
riscv-tests (benchmarks, cv64a6_imafdc_sv39_wb)
22m 4s
8h 54m 13s