Update documentation

Hardware Guide/Breakout Board/index.html

@@ -497,7 +497,7 @@
 </dd>
 <dt class="field-even">Compatibility<span class="colon">:</span></dt>
 <dd class="field-even"><p><a class="reference internal" href="../PCIe%20Host/index.html#pcie-host"><span class="std std-ref">PCIe Host</span></a>, <a class="reference internal" href="../Headstages/headstage-64/index.html#headstage-64"><span class="std std-ref">Headstage-64</span></a>,
-<a class="reference internal" href="../Headstages/headstage-neuropix-1e.html#headstage-neuropix1"><span class="std std-ref">Neuropixels-1.0e Headstage</span></a>, <a class="reference internal" href="../Miniscopes/index.html#miniscopes"><span class="std std-ref">Miniscopes</span></a></p>
+<a class="reference internal" href="../Headstages/headstage-neuropix-1.html#headstage-neuropix1"><span class="std std-ref">Neuropixels-1.0 Headstage</span></a>, <a class="reference internal" href="../Miniscopes/index.html#miniscopes"><span class="std std-ref">Miniscopes</span></a></p>
 </dd>
 </dl>
 <section id="overview">

Hardware Guide/Breakout Board/setup.html

@@ -490,6 +490,10 @@
 
   <section id="breakout-board-guide">
 <span id="breakout-setup"></span><h1>Breakout Board Guide<a class="headerlink" href="#breakout-board-guide" title="Link to this heading">#</a></h1>
+<div class="admonition warning">
+<p class="admonition-title">Warning</p>
+<p>Always make sure the PC is powered off <strong>before</strong> connecting or disconnecting the Breakout Board. Neglecting to do this will damage the PCIe Host.</p>
+</div>
 <section id="setup">
 <h2>Setup<a class="headerlink" href="#setup" title="Link to this heading">#</a></h2>
 <p>The Breakout Board provides access to signals to and from the PCIe host. Each

Hardware Guide/Commutators/index.html

@@ -497,7 +497,7 @@
 </dd>
 <dt class="field-even">Compatibility<span class="colon">:</span></dt>
 <dd class="field-even"><p><a class="reference internal" href="../PCIe%20Host/index.html#pcie-host"><span class="std std-ref">PCIe Host</span></a>, <a class="reference internal" href="../Headstages/headstage-64/index.html#headstage-64"><span class="std std-ref">Headstage-64</span></a>,
-<a class="reference internal" href="../Headstages/headstage-neuropix-1e.html#headstage-neuropix1"><span class="std std-ref">Neuropixels-1.0e Headstage</span></a>, <a class="reference internal" href="../Miniscopes/index.html#miniscopes"><span class="std std-ref">Miniscopes</span></a></p>
+<a class="reference internal" href="../Headstages/headstage-neuropix-1.html#headstage-neuropix1"><span class="std std-ref">Neuropixels-1.0 Headstage</span></a>, <a class="reference internal" href="../Miniscopes/index.html#miniscopes"><span class="std std-ref">Miniscopes</span></a></p>
 </dd>
 </dl>
 <section id="overview">

Hardware Guide/Connections & Cables/index.html

@@ -501,7 +501,7 @@ <h2>Connection types<a class="headerlink" href="#connection-types" title="Link t
 <li><p>PCIe host board: MMCX connectors</p></li>
 <li><p>Breakout board: MMCX connectors (to link to PCIe host) &amp; SMA connectors (to link to commutator or headstage).</p></li>
 <li><p>Commutator: SMA connectors to link to both breakout board and headstage.</p></li>
-<li><p>The <a class="reference internal" href="../Headstages/headstage-64/index.html#headstage-64"><span class="std std-ref">Headstage-64</span></a> &amp; <a class="reference internal" href="../Headstages/headstage-neuropix-1e.html#headstage-neuropix1"><span class="std std-ref">Neuropixels-1.0e Headstage</span></a>:  Hirose X.FL-PR-SMT1-2(80) X.FL coaxial socket connector.</p></li>
+<li><p>The <a class="reference internal" href="../Headstages/headstage-64/index.html#headstage-64"><span class="std std-ref">Headstage-64</span></a> &amp; <a class="reference internal" href="../Headstages/headstage-neuropix-1.html#headstage-neuropix1"><span class="std std-ref">Neuropixels-1.0 Headstage</span></a>:  Hirose X.FL-PR-SMT1-2(80) X.FL coaxial socket connector.</p></li>
 </ul>
 </section>
 <section id="digital-and-analog-i-o">

Hardware Guide/Datasheets/bno055.html

@@ -505,7 +505,7 @@
 <dd class="field-even"><p>9</p>
 </dd>
 <dt class="field-odd">ONIX Hubs<span class="colon">:</span></dt>
-<dd class="field-odd"><p><a class="reference internal" href="../Headstages/headstage-64/index.html#headstage-64"><span class="std std-ref">Headstage-64</span></a>, <a class="reference internal" href="../Headstages/headstage-neuropix-1e.html#headstage-neuropix1"><span class="std std-ref">Neuropixels-1.0e Headstage</span></a></p>
+<dd class="field-odd"><p><a class="reference internal" href="../Headstages/headstage-64/index.html#headstage-64"><span class="std std-ref">Headstage-64</span></a>, <a class="reference internal" href="../Headstages/headstage-neuropix-1.html#headstage-neuropix1"><span class="std std-ref">Neuropixels-1.0 Headstage</span></a></p>
 </dd>
 </dl>
 <section id="description">

Hardware Guide/Datasheets/neuropixels-v1.html

@@ -504,7 +504,7 @@
 <dd class="field-even"><p>11</p>
 </dd>
 <dt class="field-odd">ONIX Hubs<span class="colon">:</span></dt>
-<dd class="field-odd"><p><a class="reference internal" href="../Headstages/headstage-neuropix-1e.html#headstage-neuropix1"><span class="std std-ref">Neuropixels-1.0e Headstage</span></a></p>
+<dd class="field-odd"><p><a class="reference internal" href="../Headstages/headstage-neuropix-1.html#headstage-neuropix1"><span class="std std-ref">Neuropixels-1.0 Headstage</span></a></p>
 </dd>
 </dl>
 <section id="description">

Hardware Guide/Datasheets/ts4231-v1-array.html

@@ -504,7 +504,7 @@
 <dd class="field-even"><p>25</p>
 </dd>
 <dt class="field-odd">ONIX Hubs<span class="colon">:</span></dt>
-<dd class="field-odd"><p><a class="reference internal" href="../Headstages/headstage-64/index.html#headstage-64"><span class="std std-ref">Headstage-64</span></a>, <a class="reference internal" href="../Headstages/headstage-neuropix-1e.html#headstage-neuropix1"><span class="std std-ref">Neuropixels-1.0e Headstage</span></a></p>
+<dd class="field-odd"><p><a class="reference internal" href="../Headstages/headstage-64/index.html#headstage-64"><span class="std std-ref">Headstage-64</span></a>, <a class="reference internal" href="../Headstages/headstage-neuropix-1.html#headstage-neuropix1"><span class="std std-ref">Neuropixels-1.0 Headstage</span></a></p>
 </dd>
 </dl>
 <section id="description">

Hardware Guide/Headstages/headstage-neuropix-1.html

@@ -503,8 +503,8 @@
 </ul>
 <section id="coaxial-link">
 <h2>Coaxial Link<a class="headerlink" href="#coaxial-link" title="Link to this heading">#</a></h2>
-<p>For details on data serialiation and headstage gateware, have a look at the
-<a class="reference internal" href="serialization.html#serialization"><span class="std std-ref">Coaxial Data Serialization &amp; Power</span></a> page, which describes how coax headstages operatate in
+<p>For details on data serialization and headstage gateware, have a look at the
+<a class="reference internal" href="serialization.html#serialization"><span class="std std-ref">Coaxial Data Serialization &amp; Power</span></a> page, which describes how coax headstages operate in
 general terms. The Neuropixels-1.0 Headstage has the following coaxial link
 properties:</p>
 <table class="table">
@@ -550,16 +550,9 @@ <h2>Coaxial Link<a class="headerlink" href="#coaxial-link" title="Link to this h
 </tr>
 </tbody>
 </table>
-<div class="admonition important">
-<p class="admonition-title">Important</p>
-<p>*The headstage includes an undervoltage and overvoltage lockout
-circuit that will only allow it to turn on when the proper link voltage is
-present headstage. If the headstage is not turning on, make sure that the
-voltage at the headstage itself is within the valid range</p>
-</div>
 <div class="admonition note">
 <p class="admonition-title">Note</p>
-<p>Have a look at the <a class="reference internal" href="tethers.html#tethers"><span class="std std-ref">Making Coaxial Tethers</span></a> page for more details on mirco-coax
+<p>Have a look at the <a class="reference internal" href="tethers.html#tethers"><span class="std std-ref">Making Coaxial Tethers</span></a> page for more details on micro-coax
 headstage tethers</p>
 </div>
 </section>

Hardware Guide/Headstages/headstage-neuropix-1e.html

@@ -489,7 +489,7 @@
                 <article class="bd-article" role="main">
 
   <section id="neuropixels-1-0e-headstage">
-<span id="headstage-neuropix1"></span><h1>Neuropixels-1.0e Headstage<a class="headerlink" href="#neuropixels-1-0e-headstage" title="Link to this heading">#</a></h1>
+<span id="headstage-neuropix1e"></span><h1>Neuropixels-1.0e Headstage<a class="headerlink" href="#neuropixels-1-0e-headstage" title="Link to this heading">#</a></h1>
 <p>The ONIX <strong>Neuropixels-1.0e Headstage</strong> is a serialized, multifunction headstage
 targeting <a class="reference external" href="https://www.neuropixels.org/probe">Neuropixels 1.0 probes</a>.</p>
 <a class="reference internal image-reference" href="../../_images/headstage-np1e-with-probe.webp"><img alt="ONIX Headstage-Neuropixels-1.0e" class="align-center" src="../../_images/headstage-np1e-with-probe.webp" style="width: 739.5px; height: 256.34999999999997px;" /></a>
@@ -499,8 +499,8 @@
 </ul>
 <section id="coaxial-link">
 <h2>Coaxial Link<a class="headerlink" href="#coaxial-link" title="Link to this heading">#</a></h2>
-<p>For details on data serialiation and headstage gateware, have a look at the
-<a class="reference internal" href="serialization.html"><span class="doc">Coaxial Data Serialization &amp; Power</span></a> page, which describes how coax headstages operatate in
+<p>For details on data serialization and headstage gateware, have a look at the
+<a class="reference internal" href="serialization.html"><span class="doc">Coaxial Data Serialization &amp; Power</span></a> page, which describes how coax headstages operate in
 general terms. The Neuropixels-1.0e Headstage has the following coaxial link
 properties:</p>
 <table class="table">
@@ -536,7 +536,7 @@ <h2>Coaxial Link<a class="headerlink" href="#coaxial-link" title="Link to this h
 </table>
 <div class="admonition note">
 <p class="admonition-title">Note</p>
-<p>Have a look at the <a class="reference internal" href="tethers.html"><span class="doc">Making Coaxial Tethers</span></a> page for more details on mirco-coax headstage tethers</p>
+<p>Have a look at the <a class="reference internal" href="tethers.html"><span class="doc">Making Coaxial Tethers</span></a> page for more details on micro-coax headstage tethers</p>
 </div>
 <div class="admonition important">
 <p class="admonition-title">Important</p>

Hardware Guide/Headstages/serialization.html

@@ -514,7 +514,7 @@
 </div>
 <p>ONIX headstages use an FPGA to control peripheral devices and combine their
 data streams prior to serialization. For instance, <a class="reference internal" href="headstage-64/index.html#headstage-64"><span class="std std-ref">Headstage-64</span></a> and
-<a class="reference internal" href="headstage-neuropix-1e.html#headstage-neuropix1"><span class="std std-ref">Neuropixels-1.0e Headstage</span></a> use an <a class="reference external" href="https://www.intel.com/content/www/us/en/products/programmable/fpga/max-10.html">Intel MAX10 FPGA</a>.
+<a class="reference internal" href="headstage-neuropix-1.html#headstage-neuropix1"><span class="std std-ref">Neuropixels-1.0 Headstage</span></a> use an <a class="reference external" href="https://www.intel.com/content/www/us/en/products/programmable/fpga/max-10.html">Intel MAX10 FPGA</a>.
 The exact FPGA is not important because every ONI-compliant headstage is uses
 very similar gateware (FPGA-based firmware) that performs three major functions</p>
 <ol class="arabic simple">
@@ -566,7 +566,7 @@ <h2>DS90UB933/4 Communication Protocols<a class="headerlink" href="#ds90ub933-4-
 several ONIX headstages and host modules:</p>
 <ul class="simple">
 <li><p><a class="reference internal" href="headstage-64/index.html#headstage-64"><span class="std std-ref">Headstage-64</span></a> (DS90UB933 Serializer)</p></li>
-<li><p><a class="reference internal" href="headstage-neuropix-1e.html#headstage-neuropix1"><span class="std std-ref">Neuropixels-1.0e Headstage</span></a> (DS90UB933 Serilizer)</p></li>
+<li><p><a class="reference internal" href="headstage-neuropix-1.html#headstage-neuropix1"><span class="std std-ref">Neuropixels-1.0 Headstage</span></a> (DS90UB933 Serilizer)</p></li>
 <li><p><a class="reference internal" href="../PCIe%20Host/index.html#pcie-host"><span class="std std-ref">PCIe Host</span></a> (DS90UB934 Deserilizer)</p></li>
 </ul>
 <p>along with the UCLA Miniscope and its derivatives. This section describes how this

Hardware Guide/Miniscopes/index.html

@@ -533,14 +533,14 @@ <h2>UCLA Miniscope V4<a class="headerlink" href="#ucla-miniscope-v4" title="Link
 <h2>NINScope<a class="headerlink" href="#ninscope" title="Link to this heading">#</a></h2>
 <div class="admonition-todo admonition" id="id2">
 <p class="admonition-title">Todo</p>
-<p>Comming soon.</p>
+<p>Coming soon.</p>
 </div>
 </section>
 <section id="featherscope-kiloscope">
 <h2>FeatherScope &amp; Kiloscope<a class="headerlink" href="#featherscope-kiloscope" title="Link to this heading">#</a></h2>
 <div class="admonition-todo admonition" id="id3">
 <p class="admonition-title">Todo</p>
-<p>Comming soon.</p>
+<p>Coming soon.</p>
 </div>
 </section>
 </section>

Hardware Guide/PCIe Host/index.html

@@ -499,7 +499,7 @@
 </dd>
 <dt class="field-even">Compatibility<span class="colon">:</span></dt>
 <dd class="field-even"><p><a class="reference internal" href="../Headstages/headstage-64/index.html#headstage-64"><span class="std std-ref">Headstage-64</span></a>,
-<a class="reference internal" href="../Headstages/headstage-neuropix-1e.html#headstage-neuropix1"><span class="std std-ref">Neuropixels-1.0e Headstage</span></a>, <a class="reference internal" href="../Miniscopes/index.html#miniscopes"><span class="std std-ref">Miniscopes</span></a></p>
+<a class="reference internal" href="../Headstages/headstage-neuropix-1.html#headstage-neuropix1"><span class="std std-ref">Neuropixels-1.0 Headstage</span></a>, <a class="reference internal" href="../Miniscopes/index.html#miniscopes"><span class="std std-ref">Miniscopes</span></a></p>
 </dd>
 </dl>
 <figure class="align-center">

Hardware Guide/PCIe Host/overview.html

@@ -524,7 +524,7 @@ <h2>Host Module<a class="headerlink" href="#host-module" title="Link to this hea
 </figcaption>
 </figure>
 <ul class="simple">
-<li><p>Two deserailizers for any multifunction headstage conforming to the ONIX
+<li><p>Two deserializers for any multifunction headstage conforming to the ONIX
 serialization protocol</p></li>
 <li><p>12x ±10V analog outputs or inputs. Direction selected via analog switch
 controllable over the FMC connector.</p></li>

Software Guide/Bonsai.ONIX/Bonsai Examples/CameraSync.html

@@ -399,6 +399,7 @@
 </li>
 <li class="toctree-l2 current active has-children"><a class="reference internal" href="index.html">Example Workflows</a><input checked="" class="toctree-checkbox" id="toctree-checkbox-6" name="toctree-checkbox-6" type="checkbox"/><label class="toctree-toggle" for="toctree-checkbox-6"><i class="fa-solid fa-chevron-down"></i></label><ul class="current">
 <li class="toctree-l3"><a class="reference internal" href="Headstage64.html">Headstage-64 Workflow</a></li>
+<li class="toctree-l3"><a class="reference internal" href="HeadstageNP1e.html">Headstage Neuropixels 1.0e Workflow</a></li>
 <li class="toctree-l3"><a class="reference internal" href="LatencyTest.html">Latency Test Workflow</a></li>
 <li class="toctree-l3 current active"><a class="current reference internal" href="#">Camera Synchronization Workflow</a></li>
 <li class="toctree-l3"><a class="reference internal" href="Commutator.html">Manual Commutator Workflow</a></li>

Software Guide/Bonsai.ONIX/Bonsai Examples/Commutator.html

@@ -399,6 +399,7 @@
 </li>
 <li class="toctree-l2 current active has-children"><a class="reference internal" href="index.html">Example Workflows</a><input checked="" class="toctree-checkbox" id="toctree-checkbox-6" name="toctree-checkbox-6" type="checkbox"/><label class="toctree-toggle" for="toctree-checkbox-6"><i class="fa-solid fa-chevron-down"></i></label><ul class="current">
 <li class="toctree-l3"><a class="reference internal" href="Headstage64.html">Headstage-64 Workflow</a></li>
+<li class="toctree-l3"><a class="reference internal" href="HeadstageNP1e.html">Headstage Neuropixels 1.0e Workflow</a></li>
 <li class="toctree-l3"><a class="reference internal" href="LatencyTest.html">Latency Test Workflow</a></li>
 <li class="toctree-l3"><a class="reference internal" href="CameraSync.html">Camera Synchronization Workflow</a></li>
 <li class="toctree-l3 current active"><a class="current reference internal" href="#">Manual Commutator Workflow</a></li>