Release 2.0.0 bell #4450
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Release 2.0.0 bell #4450
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Remove swedish from the list of supported languages.
* Removed doubled copyright header from 'up/down/devel.sql' when committing databases. * During installing, 'devel.sql' was created even if specific revisions didn't contain one. * Removed unnecessary product-specific .lua scripts.
…he list Changed order in which files in Relaxation are displayed Added error message when files limit is exceeded
Update usb_stack submodule.
awulkiew
approved these changes
Apr 6, 2023
Reinit eMMC driver if write/read transmission failed.
Added logging of eMMC storage card parameters so that it's easy to determine what chip is installed in the device the logs are from.
…t of occupied space Fixed problem with adding files with the same name resulting in increasing its size instead of replacing the file. USB Stack changes.
Fixed problem with badly calculating characters to show which cause a problem with displaying text on UI.
…ay function Fixed problem with displaying end of title when playing song in loop was selected.
Tweaks and changes required to optimize power consumption for Harmony.
* Fixed issues with USB charging port detection * Fixed memory leak in usb_stack/OS integration layer * Fixed incorrect handling of software timer * Minor cleaning/refactor. [BH-1595] Turned off USB/PC charging Charging enabled only for a dedicated charger. Users won't be able to charger while connected to the PC.
Due to high current consumption the device will be charging only for DCP mode and if the timeout will occur.
* Fix of the issue that manifested after running MuditaOS on Harmony via JLink, which resulted in OS freezing when trying to set time in normally booted (via the bootloader) device. * Minor RTC code cleanup. * Partial T6 JLink script cleanup.
Previous voltage setting was lower than the one suggested in RT1051 RM and would lead to CPU instability in certain conditions.
* Corrected SDRAM timings in T6 JLink script. * Cleaned-up and commented JLink script. * Bumped bootloader version.
The new layout of battery status has the battery SOC on the left side and battery image on the right.
* Switching VDD_SOC_IN only after PLL2 is turned off. * Weak LDO stabilization delay. * Removed switching to 1.275V before frequency change. * Cleanups in LDO switching. * Removed switching PeriphClk2Div for fCPU <= 24MHz, using AhbDiv instead. * Removed log from _exit that caused logger mutex deadlock
Fix of the bug in PWM driver that resulted in accessing array out of bounds, what caused occasional system crash on startup.
* Fixed incorrect reset procedure * Minor refactor
Added text with information about the connection to the main window when the USB cable is connected to the PC
Fixed battery and date layout for Harmony
Next part of Harmony random resets fixes: * added RC OSC startup delay as in newest lpm.c; * changed order of clock source, oscillator and LDO switching; * removed connecting internal DCDC load resistor, as it is only required to speed up converter startup after it was turned off completely; * changed DCDC operation mode to continuous conduction; * set low VDD_SOC_IN voltage back to 950mV as suggested in RM. * added switching DCDC converter mode to discontinuous conduction for two lowest CPU clock frequencies, as using CCM mode resulted in very high current consumption that would shorten Harmony's life on battery significantly.
Minor fixes to label positioning and connection detection
Save date and time at the startup of the system for analysis purposes.
Fix critical sections for send/recv virtual com functions.
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Added mechanism that stores address of last executed instruction before RTWDOG timeout to enable some basic debugging in such cases, as such resets do not create crashdumps and leave no information in logs.
Add extra logs when the RTC timeout error occurs. In that, we can find reason in registers of what happened.
When the button is pressed/released we get an interrupt which falls or rises edge. We read the gpio state a bit later so in case of debouncing we can register the wrong pin state. After the debounce interval the state is stable.
The secure RTC can lock and the clock is not updated. To prevent this situation we reset LP registers (except for timestamps and alarms) and clear the LVD flag. Then we enable again LP SRTC.
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