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🔥 🔥 🔥
This adds an end-to-end LLVM IR -> AMD GPU JIT compiler.
The good news is that AMD GPUs support vectorized add-with-carry. The bad news is that unlike Nvidia GPUs, you cannot use inline assembly to guarantee it so you need to cajole the compiler into producing those:
Another good news is that the device function is properly vectorized without needing to use tricks like
__forceinline__
or "Scalable Vector" types in LLVM.