RISC V 32bit virtual machine
At this moment VM can execute riscv-non-isa/riscv-arch-test
subsets:
rv32i_m/I
rv32i_m/M
rv32i_m/privilege
(passecall/ebreack
, throws exception on misaligned access)
- add integration for RISC-V Architecture Test
- fix IntMath handlers
- implement tests for RV32I
- add vm::bit_utils
- add instruction encoder
- CMake: add install targets for libraries
- fix offset calculation in
load
/store
- fix
div
/rem
instructions: handle division by zero / overflows - add scripts for building RISC-V executables
- RV32I - load/store data, basic math, jumps and branches
- RV32M - integer multiplication/division
- opcode handlers
- memory access handlers
- code loaders
- system calls
- binary (
objcopy -O binary
) - intel hex (
objcopy -O ihex
)